# US 5,346,857 A · Method for forming a flip-chip bond from a gold-tin eutectic

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- Number: US 5,346,857 A
- Document ID: US5346857A
- Status: Granted
- Kind: A
- Application number: 07/952,005
- Filed: 1992-09-28
- Granted: 1994-09-13
- Earliest claimed: 1992-09-28
- Assignees: Motorola, Inc.
- Inventors: Thomas A. Scharr; Russell T. Lee; Ravichandran Subrahmanyan
- Web page: https://patentgrep.com/patent/US5346857A

## CPC

- H10W 72/072: {of bump connectors}
- H10W 72/0711: {Apparatus therefor}
- H10W 72/07141: {Means for applying energy, e.g. ovens or lasers}
- H10W 72/07235: {Applying EM radiation, e.g. induction heating or using a laser}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method for flip-chip bonding an integrated circuit die to a substrate. A substrate (21) having conductive bonding areas (22) coated with tin (23) is secured to a bottom end effector of a flip-chip bonding apparatus. An integrated circuit die (26) having gold bumps (28) is secured to a die tool of the flip-chip bonding apparatus. A gold-tin eutectic bond is formed between the integrated circuit die (26) and the conductive bonding areas (22) of the substrate (21).

## Claims

### Claim 1

A method for forming a flip-chip bond from a gold-tin eutectic, comprising the steps of:
providing a semiconductor integrated circuit having at least one gold bump;
providing a substrate having at least one conductive bonding area, the at least one conductive bonding area coated with tin; and
flip-chip bonding the at least one gold bump with the at least one conductive bonding area to form the gold-tin eutectic.

### Claim 2 (depends on 1)

A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of providing a semiconductor integrated circuit includes providing the semiconductor integrated circuit in a gallium arsenide semiconductor substrate.

### Claim 3 (depends on 1)

A method of forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of providing a substrate includes providing a substrate of an organic material.

### Claim 4 (depends on 3)

A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 3 wherein the step of providing a substrate includes providing a substrate comprising polyimide.

### Claim 5 (depends on 3)

A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 3 wherein the step of providing a substrate includes providing a substrate comprising FR-4.

### Claim 6 (depends on 1)

A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of providing a substrate includes providing a substrate comprising a ceramic material.

### Claim 7 (depends on 1)

A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of flip-chip bonding comprises:
heating the substrate at approximately 50.degree. C. per second to a temperature ranging between approximately 280.degree. C. and 315.degree. C.; and
providing a compression load ranging between approximately 3 and 5 grams per bump, wherein the compression load serves to establish contact between the at least one gold bump and the at least one conductive bonding area.

### Claim 8

A flip-chip method for bonding a semiconductor integrated circuit to a circuit board, comprising the steps of:
providing a semiconductor integrated circuit having a plurality of gold bumps;
providing a circuit board having a plurality of bonding areas, the plurality of bonding areas coated with tin and patterned to mate with the plurality of gold bumps;
flip-chip bonding the plurality of gold bumps with the plurality of bonding areas wherein the step of flip-chip bonding forms a gold-tin eutectic.

### Claim 9 (depends on 8)

A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of flip-chip bonding includes:
providing a temperature between approximately 280.degree. C. and 315.degree. C.; and
providing a compression load ranging between approximately 3 and 5 grams per bump for a time ranging between substantially 3 seconds and 10 seconds.

### Claim 10 (depends on 8)

A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of providing a semiconductor integrated circuit includes providing a gallium arsenide semiconductor integrated circuit.

### Claim 11 (depends on 8)

A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of providing a circuit board includes providing an FR-4 circuit board.

### Claim 12 (depends on 8)

A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of providing a circuit board includes providing a polyimide circuit board.