# US 5,346,840 A · Method of producing heterojunction bipolar transistor having narrow band gap base type

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- Number: US 5,346,840 A
- Document ID: US5346840A
- Status: Granted
- Kind: A
- Application number: 07/986,294
- Filed: 1992-12-07
- Granted: 1994-09-13
- Earliest claimed: 1988-11-30
- Assignees: Fujitsu Limited
- Inventors: Hiroshi Fujioka
- Web page: https://patentgrep.com/patent/US5346840A

## CPC

- H10D 10/021: {of heterojunction BJTs [HBT]}
- H10D 10/891: {comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors}
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- Y10S 148/01: Bipolar transistors-ion implantation
- Y10S 148/072: Heterojunctions
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A heterojunction bipolar transistor includes a tungsten layer formed on a base layer. An insulating sidewall is formed on the base layer and along a vertical wall of an emitter layer formed on the base layer. An end of the tungsten layer faces a base-emitter heterojunction through the sidewall.

## Claims

### Claim 1

A method of producing a heterojunction bipolar transistor, comprising the steps of:
growing a collector layer of silicon on a substrate of silicon;
growing a base layer of silicon-germanium on said collector layer;
growing an emitter layer of silicon on said base layer;
mesa-etching said collector layer, said base layer and said emitter layer so that said base layer has a first base portion and a second base portion, and said emitter layer has a vertical wall, a heterojunction being formed at an interface between said second base portion of said base layer and said emitter layer;
depositing a first insulating layer on said collector layer, said first base portion of said base layer and said emitter layer;
selectively etching said first insulating layer by an anisotropic etching process so that a sidewall which is a part of said first insulating layer is left on said first base portion and along said vertical wall of said emitter layer;
selectively growing a metallic layer on said first base portion of said base layer and said emitter layer, an edge of said metallic layer being substantially close to said heterojunction, and said metallic layer being a member selected from the group consisting of tungsten, molybdenum, tungsten silicide and platinum silicide;
forming a second insulating layer on said metallic layer and said sidewall;
forming a first contact hole through which said emitter layer is partially exposed, a second contact hole through which said collector layer is partially exposed, and a third contact hole through which said metallic layer is partially exposed; and
forming an emitter electrode, a collector electrode and a base electrode on said emitter layer, said collector layer and said first base portion through said first, second and third contact holes, respectively.

### Claim 2 (depends on 1)

A method as claimed in claim 1, wherein said metallic layer comprises a refractory metal.

### Claim 3 (depends on 1)

A method as claimed in claim 1, wherein said metallic layer comprises a refractory metal silicide.

### Claim 4 (depends on 1)

A method as claimed in claim 1, wherein said metallic layer comprises tungsten.

### Claim 5

A method of producing a heterojunction bipolar transistor, comprising the steps of:
growing a collector layer of silicon on a substrate of silicon;
forming a field insulating layer on said collector layer;
growing a base layer of silicon-germanium on said collector layer and said field insulating layer;
growing an emitter layer of silicon on said base layer;
mesa-etching said collector layer, said base layer and said emitter layer so that said base layer has a first base portion and a second base portion, and said emitter layer has a vertical wall, a heterojunction being formed at an interface between said second base portion of said base layer and said emitter layer;
depositing a first insulating layer on said collector layer, said first base portion of said base layer and said emitter layer;
selectively etching said first insulating layer by an anisotropic etching process so that a sidewall which is a part of said first insulating layer is left on said first base portion and along said vertical wall of said emitter layer;
selectively growing a metallic layer on said first base portion of said base layer of said emitter layer, said collector layer and said first base portion of said base layer, an edge of said metallic layer being substantially close to said heterojunction, and said metallic layer being a member selected from the group consisting of tungsten, molybdenum, tungsten silicide and platinum silicide;
forming a second insulating layer on said metallic layer and said sidewall;
forming a first contact hole through which said emitter layer is partially exposed, a second contact hole through which said collector layer is partially exposed, and a third contact hole through which said metallic layer is partially exposed; and
forming an emitter electrode, a collector electrode and a base electrode on said emitter layer, said collector layer and said first base portion through said first, second and third contact holes, respectively.

### Claim 6 (depends on 5)

A method as claimed in claim 5, wherein said metallic layer comprises a refractory metal.

### Claim 7 (depends on 5)

A method as claimed in claim 5, wherein said metallic layer comprises a refractory metal silicide.

### Claim 8 (depends on 5)

A method as claimed in claim 5, wherein said metallic layer comprises tungsten.