Fluorescent display panel containing chip of integrated circuit with discrepancy markers to aid in lead bonding

A fluorescent display panel, comprising:

• a set of anode segments formed on a substrate;
• fluorescent layer formed on said anode segments;
• a set of lead conductors formed on said substrate, each lead conductor of said set of lead conductors being connected to a corresponding anode segment at one end and forming a lead conductor bonding pad at an other end;
• an insulator layer formed on said substrate by a thick film process for covering said set of lead conductors;
• an aperture formed in said insulator layer for exposing surfaces of said lead conductor bonding pads;
• a chip of an integrated circuit mounted on said substrate;
• a set of bonding wires, each bonding wire of said set of bonding wires electrically connecting a bonding pad of said chip of integrated circuit to a corresponding bonding pad of a lead conductor;
• and
• at least one marker means formed on a lead conductor bonding pad including a center marker and a discrepancy marker for indicating a position discrepancy of said insulator layer from a designed position, said position discrepancy being indicated by openings formed on two sides of said marker means from two boundaries of said aperture.

A fluorescent display panel comprising:

• a set of anode segments formed on a substrate;
• fluorescent layer formed on said anode segments;
• a set of lead conductors formed on said substrate, each lead conductor of said set of lead conductors being connected to a corresponding anode segment at one end and forming a lead conductor bonding pad at the other end;
• an insulator layer formed on said substrate by thick film process for covering said set of lead conductors;
• an aperture formed in said insulator layer for exposing surfaces of said lead conductor bonding pads;
• a chip of an integrated circuit mounted on said substrate;
• a set of bonding wires, each bonding wire of said set of bonding wires electrically connecting a bonding pad of said chip of integrated circuit to a corresponding bonding pad of a lead conductor;
• and
• at least one marker means formed on a lead conductor bonding pad including a center marker and a discrepancy marker for indicating position discrepancy of said insulator layer from a designed position, one end of said marker means forming said center marker at which a bonding tip is to be positioned when said position discrepancy is sufficiently small and an other end of said marker figure forming said discrepancy marker indicating an amount of said discrepancy from a boundary of said aperture.