# US 5,345,378 A · Method and apparatus for operating a programmable controller for controlling a technical process

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 5,345,378 A
- Document ID: US5345378A
- Status: Granted
- Kind: A
- Application number: 07/905,807
- Filed: 1992-06-29
- Granted: 1994-09-06
- Earliest claimed: 1991-06-28
- Assignees: Siemens Aktiengesellschaft
- Inventors: Georg Lang; Georg Trummer; Edgar Sigwart; Werner Fraas; Andrea Misler; Gerhard Reinert
- Web page: https://patentgrep.com/patent/US5345378A

## CPC

- G06F 9/3877: {using a secondary processor, e.g. coprocessor (peripheral processor G06F13/12)}
- G05B 19/042: using digital processors (G05B19/05 takes precedence)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)

## Abstract

One cycle of a programmable controller includes reading-in (E) the input signals, processing (B) the input signals, whereby inter alia the output signals are calculated, and outputting (A) the output signals. The time one cycle takes can be shortened by processing (B) the input signals at least in part simultaneously with the outputting (A) of the output signals of the preceding cycle and with the reading-in (E) of the input signals of the subsequent cycle.

## Claims

### Claim 1

A method of operating a programmable controller for controlling a technical process with a process interface system linked to the programmable controller, comprising the following cyclically executed steps:
reading input signals supplied by the process interface system into the programmable controller;
processing the input signals to thereby determine output signals for the process interface system from the input signals; and
outputting the output signals to the process interface system,
wherein the processing of the input signals of one cycle takes place, at least in part, simultaneously with the outputting of the output signals of the preceding cycle and with the reading in of the input signals of the subsequent cycle, and
wherein the outputting of the output signals of the preceding cycle takes place at a different time than the inputting of the input signals of the subsequent cycle.

### Claim 2 (depends on 1)

The method of claim 1 wherein said programmable controller is of a modular design.

### Claim 3 (depends on 1)

The method of claim 1, further comprising the step of:
copying the output signals of a preceding cycle from a working storage into a buffer storage, and copying the input signals of a present cycle from said buffer storage into said working storage before the processing of the input signals of said present cycle, so that the input signals of a subsequent cycle and the output signals of the preceding cycle are not changed as the result of the processing of the present cycle.

### Claim 4 (depends on 3)

The method of claim 3, wherein the reading in of the input signals of the subsequent cycle takes place only after the outputting of the output signals of the preceding cycle.

### Claim 5 (depends on 3)

The method of claim 3, further comprising steps of:
repeatedly reading in at least one of the input signals of the next cycle during the processing of the input signals of one cycle;
after the processing of the input signals of one cycle is complete, waiting for the completion of the read-in operation running at the moment, or when no read-in operation is running, waiting for the next read-in operation; and
copying the output signals of the cycle into the buffer storage and copying the input signals of the next cycle into the working storage after completion of the read-in operation, wherein the output signals are output to the process interface system after the copying of the output signals of the cycle into the buffer storage.

### Claim 6 (depends on 3)

The method of claim 3, further comprising steps of:
outputting the output signals to the process interface system, and copying the input signals into the working storage after the copying of the output signals of one cycle into the buffer storage and the reading-in of the input signals are processed after the copying of the input signals into the working storage;
copying the output signals into the buffer storage after the processing of the input signals and the outputting of the output signals of the preceding cycle; and
reading the input signals of the next cycle into the buffer storage after the outputting of the output signal sand the copying of the input signals.

### Claim 7 (depends on 6)

The method of claim 6, wherein each process step is initiated immediately upon reaching its acceptability conditions.

### Claim 8 (depends on 3)

The method of claim 3, wherein the outputting of the output signals to the process interface system takes place, at least in part, during the copying of the input signals into the working storage.

### Claim 9 (depends on 3)

The method of claim 3, wherein the reading-in of the input signals from the process interface system takes place, at least in part, during the copying of the output signals into the buffer storage.

### Claim 10 (depends on 1)

The method of claim 1, wherein the reading in of the input signals of the subsequent cycle takes place only after the outputting of the output signals of the preceding cycle.

### Claim 11 (depends on 10)

The method of claim 10, further comprising steps of:
repeatedly reading in at least one of the input signals of the next cycle during the processing of the input signal of one cycle;
after the processing of the input signals of one cycle is complete, waiting for the completion of the read-in operation running at the moment, or when no read-in operation is running, waiting for the next read-in operation; and
copying the output signals of the cycle into the buffer storage and copying the input signals of the next cycle into the working storage after completion of the read-in operation
wherein the output signals are output to the process interface system after the copying of the output signals of the cycle into the buffer storage.

### Claim 12 (depends on 10)

The method of claim 10, further comprising steps of:
outputting the output signals to the process interface system, and copying the input signals into the working storage after the copying of the output signals of one cycle into the buffer storage and the reading-in of the input signals of the next cycle into the buffer storage;
said input signals are processed after the copying of the input signals into the working storage;
copying the output signals into the buffer storage after the processing of the input signals and the outputting of the output signals of the preceding cycle; and
reading the input signals of the next cycle into the buffer storage after the outputting of the output signals and the copying of the input signals.

### Claim 13 (depends on 12)

The method of claim 12, wherein each process step is initiated immediately upon reaching its acceptability conditions.

### Claim 14 (depends on 1)

The method of claim 1, further including steps of:
reading input signals out of a working storage during the processing of the input signals of one cycle;
filing the output signals determined during the processing in the working storage;
reading the output signals of the preceding cycle out of a buffer storage during an outputting of output signals;
reading the input signals of the subsequent cycle into the buffer storage during a reading in of the input signals; and
swapping the functions of the working storage and the buffer storage after the above steps are completed, so that after the function swap, the previous working storage functions as a buffer storage and the previous buffer storage functions as a working storage.

### Claim 15 (depends on 1)

The method of claim 1 further comprising steps of:
comparing the preceding output value with the present output value; and
determining whether the output value changed; wherein the outputting of the output value step is only performed if the output value has changed.

### Claim 16 (depends on 15)

The method of claim 15, further comprising a step of:
performing a line test by outputting all output signals, in each case, after a preselectable number of cycles.

### Claim 17 (depends on 1)

The method of claim 1 further comprising steps of:
comparing the preceding input value with the present input value; and
determining whether the input value changed;
wherein the input value is only read into the buffer storage if the input value has changed.

### Claim 18 (depends on 17)

The method of claim 17, further comprising steps of:
initially reading the input signals into at least one input unit;
comparing the read in input signals to the input signals last read into the buffer storage in the input unit; and
signaling each change in the input signals to a central processing unit so that the central processing unit is then able to selectively read in the modified input signals.

### Claim 19 (depends on 18)

The method of claim 18 wherein an interrupt performs the step of signalling of each change in the input signals to the central processing unit.

### Claim 20 (depends on 18)

The method of claim 18, wherein the input signals are read into the input unit only when a read-in command sent out by the central processing unit is present.

### Claim 21 (depends on 18)

The method of claim 18, further comprising a step of:
performing a line test by reading all input signals, in each case, after a preselectable number of cycles.

### Claim 22 (depends on 17)

The method of claim 17, further comprising steps of:
initially reading the input signals into at least one input unit;
comparing the input signals read in to the input signals last read into a buffer storage in the input unit,
filing any changed input signals in the buffer storage by the input unit.

### Claim 23 (depends on 22)

The method of claim 22, wherein the input signals are read into the input unit only when a read-in command sent out by the central processing unit is present.

### Claim 24 (depends on 22)

The method of claim 22, further comprising a step of:
performing a line test by reading all input signals, in each case, after a preselectable number of cycles.

### Claim 25 (depends on 17)

The method of claim 17, wherein the input signals are read into the input unit only when a read-in command sent by the central processing unit is present.

### Claim 26 (depends on 17)

The method of claim 17, further comprising a step of:
performing a line test by reading all input signals, in each case, after a preselectable number of cycles.