# US 5,345,235 A · Scaled reference analog-to-digital conversion circuitry and method of operation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,345,235 A - Document ID: US5345235A - Status: Granted - Kind: A - Application number: 08/044,683 - Filed: 1993-04-12 - Granted: 1994-09-06 - Earliest claimed: 1993-04-12 - Assignees: Motorola, Inc. - Inventors: Mark H. Babcock - Web page: https://patentgrep.com/patent/US5345235A ## CPC - H03M 1/182: {the feedback signal controlling the reference levels of the analogue/digital converter} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract Circuitry for converting analog signal voltages to digital values comprises an analog-to-digital (A/D) converter (170) for receiving an analog signal voltage and analog reference voltages and for generating in accordance therewith a first digital value. The circuitry further comprises first and second digital-to-analog (D/A) converters (175, 180) coupled to the A/D converter (170) for providing the analog reference voltages to the A/D converter (170). A controller (120) coupled to the first and second D/A converters (175, 180) and the A/D converter (170) receives the first digital value and generates therefrom at least a second digital value for subsequent transmission to at least one of the first and second D/A converters (175 or 180), in response to which the at least one of the first and second D/A converters (175 or 180) adjusts at least one of the analog reference voltages provided to the A/D converter (170). ## Claims ### Claim 1 A method for increasing the effective resolution of an analog-to-digital (A/D) converter for receiving analog voltages and converting the analog voltages to digital values, the method comprising the steps of: (a) providing high and low analog reference voltages to the A/D converter; (b) receiving the digital values from the A/D converter for an amount of time; (c) comparing a higher value of the digital values received during the amount of time to a peak threshold value stored in memory; (d) comparing a lowest value of the digital values received during the amount of time to a valley threshold value stored in the memory; (e) replacing the high analog reference voltage with a voltage representative of the peak threshold value when the highest value of the digital values is less than the peak threshold value; and (f) replacing the low analog reference voltage with a voltage representative of the valley threshold value when the lowest value of the digital values is greater than the valley threshold value. ### Claim 2 (depends on 1) The method according to claim 1, wherein step (a) comprises the steps of: (g) a controller providing a high digital reference voltage to a first D/A converter; (h) the first D/A converter converting the high digital reference voltage to the high analog reference voltage for transmission to the A/D converter; (i) the controller providing a low digital reference voltage to a second D/A converter; and (j) the second D/A converter converting the low digital reference voltage to the low analog reference voltage for transmission to the A/D converter. ### Claim 3 (depends on 2) The method according to claim 2, wherein step (e) comprises the steps of: (k) the controller providing the peak threshold value to the first D/A converter, wherein the peak threshold value is digital; and (l) the first D/A converter converting the peak threshold value to the voltage representative of the peak threshold value for transmission to the A/D converter. ### Claim 4 (depends on 2) The method according to claim 2, wherein step (f) comprises the steps of: (m) the controller providing the valley threshold value to the second D/A converter, wherein the valley threshold value is digital; and (n) the second D/A converter converting the valley threshold value to the voltage representative of the valley threshold value for transmission to the A/D converter. ### Claim 5 A method for increasing the effective resolution of an analog-to-digital (A/D) converter for converting analog voltages to digital values, the method comprising the steps of: (a) providing first high and low analog reference voltages to the A/D converter; (b) receiving the digital values from the A/D converter for an amount of time; (c) storing a highest digital value and a lowest digital value received during the amount of time; (d) replacing the first high analog reference voltage with a second high analog reference voltage that is a first predetermined number of steps above the highest digital value when the highest digital value is less than the first high analog reference voltage; and (d) replacing the first low analog reference voltage with a second low analog reference voltage that is a second predetermined number of steps below the lowest digital value when the lowest digital value is greater than the first low analog reference voltage. ### Claim 6 (depends on 5) The method according to claim 5, wherein: step (a) comprises the steps of: (f) a controller providing high and low digital values to first and second D/A converters; and (g) the first and second D/A converters converting the high and low digital values into the high and low analog reference voltages for transmission to the A/D converter. ### Claim 7 Circuitry for converting analog signal voltages to digital values, the circuitry comprising: an analog-to-digital (A/D) converter for receiving the analog signal voltages and high and low analog reference voltages and for generating in accordance therewith the digital values; receiving means for receiving the digital values from the A/D converter for an amount of time; comparing means coupled to the receiving means for comparing a highest value of the digital values received during the amount of time to a peak threshold value stored in memory and for comparing a lowest value of the digital values received during the amount of time to a valley threshold value stored in the memory; first replacing means coupled to the comparing means and the A/D converter for replacing the high analog reference voltage with a voltage representative of the peak threshold value when the highest value of the digital values is less than the peak threshold value; and second replacing means coupled to the comparing means and the A/D converter for replacing the low analog reference voltage with a voltage representative of the valley threshold value when the lowest value of the digital values is greater than the valley threshold value. ### Claim 8 (depends on 7) The circuitry according to claim 7, wherein the receiving and comparing means is included in a controller coupled to the A/D converter and the memory. ### Claim 9 (depends on 7) The circuitry according to claim 7, wherein the first and second replacing means comprises a controller, coupled to the A/D converter and the memory, and first and second D/A converters coupled to the A/D converter and the controller. ### Claim 10 (depends on 7) The circuitry according to claim 7, wherein the circuitry is included in a data communication receiver for receiving analog signals, converting the analog signals to digital signals, and recovering messages from the digital signals. ### Claim 11 Circuitry for converting analog signal voltages to digital values, the circuitry comprising: an analog-to-digital (A/D) converter for receiving the analog signal voltages and first high and low analog reference voltages and for generating in accordance therewith the digital values; receiving means for receiving the digital values from the A/D converter for an amount of time; storing means coupled to the receiving means for storing a highest digital value and a lowest digital value received during the amount of time; first replacing means coupled to the storing means and the A/D converter for replacing the first high analog reference voltage with a second high analog reference voltage that is a first predetermined number of steps above the highest digital value when the highest digital value is less than the first high analog reference voltage; and second replacing means coupled to the storing means and the A/D converter for replacing the first low analog reference voltage with a second low analog reference voltage that is a second predetermined number of steps below the lowest digital value when the lowest digital value is greater than the first low analog reference voltage. ### Claim 12 (depends on 11) The circuitry according to claim 11, wherein the receiving means comprises a controller coupled to the A/D converter. ### Claim 13 (depends on 12) The circuitry according to claim 12, wherein the storing means comprises a random access memory coupled to the controller. ### Claim 14 (depends on 13) The circuitry according to claim 13, wherein the first and second replacing means comprises the controller and first and second D/A converters coupled to the controller and the A/D converter for providing analog voltages thereto. ### Claim 15 (depends on 14) The circuitry according to claim 14, wherein the circuitry is included in a data communication receiver for receiving analog signals, converting the analog signals to digital signals, and recovering messages from the digital signals.