Method and apparatus for interim, in-situ testing of an electronic system with an inchoate ASIC
AssigneeLSI Logic Corporation
InventorsMichael D. Rostoker, David Gluss, Tom Harrington
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AssigneeLSI Logic Corporation
InventorsMichael D. Rostoker, David Gluss, Tom Harrington
Estimating the term…
A technique for testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, using an inchoate (designed, but not yet fabricated) ASIC on an interim basis. In one embodiment, a Q-part, or qualification part, which is essentially a bond-out of the core cell, is used in conjunction with programmable logic devices configured to perform the function of the surrounding logic. The Q-part and programmable logic are interconnected on a pod, and plugged into an interim version of a target electronic system. In another embodiment, the Q-part is software-simulated and interconnected on the pod to programmable logic devices. The programmable logic devices may be programmed either on-pod or off-pod, and signals incident to the operation of the pod plugged into the interim electronic system can be monitored and controlled.
A method of testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, comprising:
A method of simulating the performance of an inchoate ASIC having a core cell and surrounding logic, comprising:
Apparatus for testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, using an inchoate ASIC on an interim basis, comprising:
Dependencies are inferred from the claim text.