DMD architecture and timing for use in a pulse-width modulated display system
AssigneeTexas Instruments Incorporated
InventorsPaul M. Urbanus, Jeffrey B. Sampsell
Life of this patent
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Abstract
It is possible to replace a standard tuning unit in a television with spatial light modulator circuitry to improve the resolution seen by the viewer. The invention herein provides a system architecture, individual part of the system and techniques for minimizing the burst data rate while maintaining a reasonable system speed. The resultant system provides better resolution with a manageable data rate and bandwidth.
Claims20
A method of displaying data comprising address memory cells and loading display data into said memory cells, wherein said display data is comprised of at least two data bits, transferring the contents of said memory cells onto display pixels so that each said data bit is displayed for a portion of the total frame time appropriate for the level of significance of said data bit.
A method of displaying data comprising:
- a. providing a display data word, said data word having at least two data bits;
- b. loading one of said data bits into a memory cell;
- c. displaying said data bit by altering the state of a display pixel based on said data bit loaded in said memory cell, wherein said display pixel is altered for a display period dependent on the level of significance of said data bit loaded in said memory cell;
- d. loading another one of said data bits into a memory cell during said display period;
- e. repeating said steps of displaying said data bit and loading another one of said data bits until all of said at least two data bits have been displayed.
A method of displaying data comprising:
- a. providing a display data word, said data word having at least two data bits;
- b. loading one of said data bits into a memory cell;
- c. displaying said data bit by altering the state of a display pixel based on said data bit loaded in said memory cell, wherein said display pixel is altered for a display period dependent on the level of significance of said data bit loaded in said memory cell;
- d. clearing said display pixel at the end of said display period;
- e. loading another one of said data bits into a memory cell;
- f. repeating said steps of displaying said data bit, clearing said display, pixel, and loading another one of said data bits until all of said at least two data bits have been displayed.
Dependencies are inferred from the claim text.