Multi-layered integrated circuit package with improved high frequency performance
AssigneeIntergraph Corporation
InventorsSteven R. Boyle, Robert J. Proebsting, William H. Herndon
Life of this patent
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AssigneeIntergraph Corporation
InventorsSteven R. Boyle, Robert J. Proebsting, William H. Herndon
Estimating the term…
A multi-layered package is disclosed that employs novel shielding techniques to improve high frequency performance of the package. Shield vias are placed near conductive vias to create a two-wire transmission line with controllable characteristic impedance. Controlled transmission line impedance reduces signal reflection due to line impedance variations and ground bounce due to inductive coupling. Opposite polarity shielding technique is introduced in vertical as well as horizontal directions to reduce capacitive coupling of noise between signals and provide immunity against differential power supply noise. Signal layers disposed half way between floating shield planes provided immunity against non-common mode noise coupling. For integrated circuits with varying types of signals (e.g. CMOS and TTL and ECL type signals), the package creates electrically isolated zones to drastically reduce noise coupling between the circuits with different signal types.
An improved multi-layered integrated circuit package having a plurality of interleaved layers of conductive material and dielectric material sandwiched between a top plate and a bottom plate, and surrounding a die-attach area of predetermined size, the package comprising:
An improved multi-layered integrated circuit package comprising:
An improved multi-layered integrated circuit package having a plurality of interleaved layers of conductive material and dielectric material sandwiched between a top plate and a bottom plate, and surrounding a die-attach area of predetermined size, the package comprising:
Dependencies are inferred from the claim text.