High voltage generator having a self-timed clock circuit and charge pump, and a method therefor

A voltage generator for an integrated circuit having an input for receiving a power supply voltage, the voltage generator providing a high voltage of the same polarity as the power supply voltage for use by circuits formed on or above a substrate of the integrated circuit, the voltage generator comprising the combination of:

• a capacitive output node, insulated from the substrate, to receive the high voltage;
• a first regulator coupled to monitor the high voltage;
• a first clock circuit responsively coupled to said first regulator;
• a first charge pump responsively coupled to the first clock circuit and having an output to provide charge having the same polarity as the power supply voltage to said capacitive output node;
• a second, selectively actuable clock circuit;
• a second charge pump responsively coupled to the second clock circuit and having an output to provide charge having the same polarity as the power supply voltage to said capacitive output node;
• at least one of said clock circuits being a self-timed clock circuit which is configured to produce a full cycle of clock pulses for use by the corresponding charge pump after the clock circuit is activated or enabled, said full cycle being produced by the clock circuit despite any termination of any activation signal or enable signal during the full cycle of clock pulses.

A method of generating a high voltage having the same polarity as a power supply voltage for an integrated circuit, for use by circuits formed on or above a substrate of the integrated circuit, comprising the steps of:

• monitoring the high voltage with a first regulator;
• selectively operating a first clock circuit, based on the output of said first regulator, to produce first clock signals;
• operating a first charge pump based on the first clock signals to pump high voltage of the same polarity as the power supply voltage to a capacitive output node insulated from the substrate;
• selectively operating a second clock circuit to produce second clock signals;
• operating a second charge pump based on the second clock signals circuit to pump high voltage of the same polarity as the power supply voltage to the capacitive output node;
• at least one of said steps of operating a clock circuit including self-timing the clock circuit to produce a full cycle of clock pulses for use by the corresponding charge pump after the clock circuit is activated or enabled, said full cycle being produced by the clock circuit despite any termination of any activation signal or enable signal during the full cycle of clock pulses.

The method of 16 wherein the integrated circuit is a dynamic memory having power-up, active and standby modes;

• wherein said step of monitoring with a first regulator includes operating a low-power regulator circuit that is active at all times when the memory is powered;
• wherein the step of operating the first charge pump provides the high voltage to the capacitive node when the memory is powering up and when it is in the memory standby mode;
• wherein the step of operating the second charge pump provides said high voltage to the capacitive node when the memory is in the active mode;
• wherein the method of generating a high voltage further comprises selectively applying a first enable control signal to a second regulator and monitoring the high voltage with the second regulator after receiving the first enable control signal;
• wherein the step of operating the second clock circuit includes providing an activation signal from the second regulator to the second clock circuit.

The method of 19 wherein operating the at least one self-timed clock circuit further comprises:

• in response to setting said latch into said first state, generating a first plurality of clock signals for pumping said charge pump over a first self-timed interval;
• producing a first internal control signal at the end of the first self-timed interval;
• using said first internal control signal to set said latch into said second state;
• in response to said latch being set into said second state, generating a second plurality of clock signals for precharging said charge pump over a second self-timed interval;
• producing a second internal control signal at the end of the second self-timed interval;
• and then
• enabling said latch to initiate another full cycle of clock pulses for the charge pump.

A method of generating a high voltage having the same polarity as a power supply voltage for an integrated circuit, for use by circuits formed on or above a substrate of the integrated circuit, comprising the steps of:

• in response to a demand signal, initiating the generation of a full cycle of clock signals over a predetermined interval, said full cycle including a plurality of first clock signals followed by a plurality of second clock signals, said full cycle being generated despite any termination in the demand signal;
• using said first clock signals to cause a charge pump to pump charge having the same polarity as the power supply voltage to a capacitive node insulated from the substrate;
• and
• using said second clock signals to precharge the charge pump.

A method of operating a charge pump for providing a high voltage to a capacitive node insulated from a substrate of an integrated circuit comprising the steps of:

• obtaining a demand signal indicative of a demand for high voltage and applying the demand signal to an input of a self-timed clock circuit;
• operating the self-timed clock circuit in response to said demand signal to generate clock signals;
• operating a charge pump connected to the self-timed clock circuit in a pump mode and then a precharge mode, the pump mode pumping charge having the same polarity as the power supply voltage to a capacitive node insulated from the substrate;
• and thereafter
• entering a quiescent state wherein the self-timed clock circuit is ready to respond to a subsequent demand signal,
• including continuing said operating steps to completion even if the demand signal terminates before said completion;
• and
• disregarding any demand signals subsequent to the first-received demand signal but before said completion.

A high voltage generator for an integrated circuit having an input to receive a power supply voltage comprising:

• a first self-timed clock circuit having an input for receiving a demand signal,
• the clock circuit being configured so that once initiated, the clock circuit executes a full self-timed cycle even if the demand signal terminates during the self-timed cycle;
• and
• a charge pump responsive to the clock signals for pumping charge having the same polarity as the power supply voltage to a capacitive node insulated from the substrate,
• the charge pump being further responsive to the clock signals provided in the full cycle, after said pumping, for preparing for subsequent pumping.

A high voltage generator for an integrated circuit having an input to receive a power supply voltage comprising:

• input means for providing a demand signal indicative that high voltage is in demand;
• a clock circuit coupled to receive the demand signal for generating a full set of clock signals including first clock signals for use by a charge pump to pump charge and second clock signals for precharging the charge pump;
• the clock circuit being configured to complete said generating of a full set of clock signals despite any termination of the demand signal;
• a charge pump responsively coupled to the clock circuit;
• and
• a capacitive output node insulated from a substrate of the integrated circuit;
• the charge pump being effective to pump charge having the same polarity as the power supply voltage to said capacitive node in response to said first clock signals;
• the charge pump being precharged by the second clock signals;
• whereby the generation of a full set of clock signals permits the charge pump to pump and precharge fully in response to receipt of a demand signal despite any change in the demand signal during said full cycle of clock signals.