Semiconductor storage device

Abstract

The present invention relates to a semiconductor storage device for executing an address multiplex method. An object of the invention is to provide a semiconductor storage device capable of higher access speed, and the semiconductor storage device includes a first timing circuit (1) for detecting a time at which a row address strobe signal is inactivated and for outputting a first timing signal; a second timing circuit (1) for detecting a time change from the inactive state to the active state of the row address strobe signal and for outputting a second timing signal; an address change detection circuit (5) for detecting a change of content of a row address signal between the first timing signal and the second timing signal and for outputting an address change signal; a row decoder (13) for decoding the content of the row address signal in accordance with the first timing signal, and when the address change signal is output, for decoding the content of the row address signal in accordance with the second timing signal; and a word line driver (14) for activating the decoded word line in accordance with the second timing signal; and is applied to a random access memory.

Dependencies are inferred from the claim text.