Method for fabricating a semiconductor device having a multi-layered interconnection structure
AssigneeNEC Corporation
InventorTetsuya Homma
Life of this patent
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Abstract
A method of fabricating a multi-layered interconnection structure which comprises the steps of: forming a first wiring layer on a silicon oxide film having a compressive stress; forming a thick (2 to 3.5 .mu.m) fluorine-containing silicon oxide film at a temperature not higher than 200 .degree. C.; etching back the fluorine-containing silicon oxide film to flatten the surface of the film; forming a silicon oxide film having a compressive stress; forming a through-hole in position; and forming a second wiring layer. Since the fluorine-containing silicon oxide film is used as part of an insulating film, a resistance to cracking, flatness and reliability are significantly improved.
Claims9
A method for fabricating a semiconductor device having a multi-layered interconnection structure, which method comprising the steps of:
- (a) forming a first wiring layer on a surface of a semiconductor substrate through an insulating film;
- (b) forming a first silicon oxide film on the first wiring layer;
- (c) forming a fluorine-containing silicon oxide film on the first silicon oxide film;
- (d) forming a flattening film on the fluorine-containing silicon oxide film;
- (e) etching back the flattening film by dry etching to remove the flattening film and flatten the surface of the fluorine-containing silicon oxide film;
- (f) forming a second silicon oxide film on the flattened surface formed in step (e);
- (g) forming in position a through-hole which passes through the first silicon oxide film, the fluorine-containing silicon oxide film and the second silicon oxide film;
- (h) forming a second wiring layer on the second silicon oxide film such that part of the second wiring layer connects the first wiring layer through the through-hole;
- and
- (i) repeating the steps (b) to (h) to form a repeated number of layers individually formed by the respective steps (b) to (h).
A method for fabricating a semiconductor device having a multi-layered interconnecting structure, said method comprising the steps of:
- (a) forming a first wiring layer on a surface of a semiconductor substrate, an insulating film separating said layer and said surface;
- (b) forming a first silicon oxide film on the first wiring layer;
- (c) forming a fluorine-containing silicon oxide film on the first silicon oxide film, said fluorine-containing silicon oxide film being formed by a chemical vapor deposition at a temperature not higher than 200.degree. C. wherein a source gas used includes a vapor mixture taken from a group consisting of mainly an alkoxyfluorosilane ((F.sub.n Si(OR).sub.4-1) where R represents an alkyl group and n is an integer of 1-3 or an organosilicon compound which is free of any fluorine atoms and an alkoxyfluorosilane, and steam, said alkoxyfluorosilane being one or more members selected from the group consisting of triethoxyfluorosilane, trimethoxyfluorosilane, tripropoxyfluorosilane and tributoxyfluorosilane;
- (d) forming a flattening film on the fluorine-containing silicon oxide film;
- (e) etching back the flattening film by dry etching to remove the flattening film and flatten the surface of the fluorine-containing silicon oxide film;
- (f) forming a second silicon oxide film on the flattened surface formed in step (e);
- (g) forming in position a through-hole which passes through the first silicon oxide film, the fluorine-containing silicon oxide film, and the second silicon oxide film;
- (h) forming a second wiring layer on the second silicon oxide film such that part of the second wiring layer connects the first wiring layer through the through-hole;
- and
- (i) repeating the steps (b) to (h) to repeatedly form a number of layers individually formed by the respective steps (b) to (h).
Dependencies are inferred from the claim text.