Information processing system having a data protection unit

An information processing system, comprising:

• a bus;
• a central processing unit connected to said bus for carrying out data processing in accordance with a program, producing a reset order signal as long as said central processing unit normally operates;
• a main memory unit connected to said bus for memorizing data;
• and
• a data protection unit, connected to said bus for protecting the data in said main memory unit from destruction by supplying said main memory unit with a write inhibit signal when said program runs away, said data protection unit comprising:
• a reset order receiving circuit connected to said bus for receiving said reset order signal, said reset order receiving circuit producing a count reset signal whenever it receives said reset order signal;
• a counter circuit, connected to said reset order receiving circuit, for carrying out count operation independent of the operation of said program, said counter circuit being reset in response to said count reset signal and producing a key reset signal when said counter circuit overflows;
• and
• a key register circuit connected to said bus and said counter circuit for holding key values, said key register circuit being reset in response to said key reset signal, thereby producing key values equal to said write inhibit signal.