US 5,333,162 A · High resolution time interval counter

Abstract

A high resolution counter circuit measures the time interval between the occurrence of an initial and a subsequent electrical pulse to two nanoseconds resolution using an eight megahertz clock. The circuit includes a main counter for receiving electrical pulses and generating a binary word--a measure of the number of eight megahertz clock pulses occurring between the signals. A pair of first and second pulse stretchers receive the signal and generate a pair of output signals whose widths are approximately sixty-four times the time between the receipt of the signals by the respective pulse stretchers and the receipt by the respective pulse stretchers of a second subsequent clock pulse. Output signals are thereafter supplied to a pair of start and stop counters operable to generate a pair of binary output words representative of the measure of the width of the pulses to a resolution of two nanoseconds. Errors associated with the pulse stretchers are corrected by providing calibration data to both stretcher circuits, and recording start and stop counter values. Stretched initial and subsequent signals are combined with autocalibration data and supplied to an arithmetic logic unit to determine the time interval in nanoseconds between the pair of electrical pulses being measured.

Claims17

Dependent claims

A high-resolution low-power time interval counter circuit for measuring the time interval between the occurrence of an initial electrical pulse and a subsequent electrical pulse, comprising:

a) an input circuit means for receiving said initial electrical pulse, said subsequent electrical pulse, a plurality of clock pulses from a clock signal generating means, and a precise set of timing pulses for generating plural output electrical signals;
b) a first pulse stretcher circuit means for receiving a first series of said electrical signals from said input circuit means, and for generating a first stretched electrical signal therefrom;
c) a second pulse stretcher circuit means for receiving a second series of said electrical signals from said input circuit means, and for generating a second stretched electrical signal therefrom;
d) an autocalibration circuit means for calibrating said first and said second pulse stretcher circuit means prior to said input circuit means receiving said initial and said subsequent electrical pulses, said autocalibration circuit provides said precise set of timing pulses through said input circuit for said stretcher circuits and then to a plurality of counting means for providing time interval data;
and
e) an arithmetic logic circuit wherein said precise set of timing pulses are used as calibration data by said arithmetic logic circuit to correct inaccuracies in time measurement of said stretcher circuits, and wherein said arithmetic logic circuit is responsive to said time interval data from said plurality of counting circuit means that receive said first and said second stretched electrical signals and determines the time interval between said initial and said subsequent electrical pulses based on said calibration data and said stretched electrical signals.

3 more elements

A high-resolution low-power time interval counter circuit for measuring the time interval between the occurrence of an initial and a subsequent electrical pulse, comprising:

a) an input circuit means for receiving said initial and said subsequent electrical pulses, for receiving a plurality of clock pulses from a clock generating means, and for receiving precise timing pulses for generating calibration data;
b) a dual pulse stretcher circuit coupled to said input means, further comprising;
i) a first pulse stretcher circuit for receiving a first electrical signal, related to said initial pulse or to said calibration data where said first pulse stretcher generates a first stretched signal therefrom;
ii) a second pulse stretcher circuit for receiving a second electrical signal, related to said second pulse or said calibration data where said second pulse stretcher generates a second stretched signal therefrom;
c) a plurality of counting circuits coupled to said clock generator means for providing START, STOP, and NCOUNT data from said input circuit means and said dual pulse stretcher circuit;
d) an autocalibration circuit coupled to said input means for correcting measurement errors within said first and second pulse stretcher circuits prior to receipt of said electrical pulses by said input means;
and
e) an arithmetic logic circuit coupled to said autocalibration circuit and to said plurality of counting circuits wherein said arithmetic logic circuit receives and distinguishes between, and separately stores a series of calibration pulses, said START count data, said STOP count data, and said NCOUNT count data, wherein said arithmetic logic circuit determines the time interval between said initial and said subsequent electrical pulses based on an analysis of said received count data.

5 more elements

A high resolution counter circuit utilizing a clock circuit for generating a plurality of clock pulses in serial fashion and operable to measure the time interval between the occurrence of an electrical pulse A and the occurrence of a subsequent electrical pulse B, comprising:

(a) input circuit means for receiving said electrical pulses A and B and said plurality of clock pulses;
(b) a main counter circuit coupled to said input circuit means wherein said main counter circuit generates a binary word NCOUNT which is a measure of the number of clock pulses occurring between a rising edge A of said electrical pulse A and a rising edge B of said electrical pulse B;
(c) a first pulse stretcher circuit for receiving said electrical pulse A wherein said first pulse stretcher circuit generates therefrom an output signal OUTA whose width is proportional to a time difference between the leading edge of said electrical pulse A and a subsequent timing pulse;
(d) a second pulse stretcher circuit for receiving said electrical pulse B and generating therefrom an output signal OUTB whose width is proportional to the time between the receipt of said electrical pulse B and the receipt of the second subsequent clock pulse;
(e) a start counter circuit for receiving said output signal OUTA from said first pulse stretcher circuit and generating a binary word NSTART therefrom which is a measure of the width of said output signal OUTA;
(f) a stop counter circuit for receiving said output signal OUTB from said second pulse stretcher circuit and generating a binary word NSTOP therefrom which is a measure of the width of said output signal OUTB;
(g) an autocalibration circuit for correcting measurement errors within said first and second pulse stretcher circuits and generating calibration data STRT(125), STRT(250), STOP(125) and STOP(250), wherein said autocalibration circuit is coupled to said input circuit and an arithmetic logic circuit;
(h) an arithmetic logic circuit for receiving said signals NCOUNT, NSTART and NSTOP and said calibration data STRT(125), STRT(250), STOP(125) and STOP(250), and determining the time interval T(A-B) between said electrical pulse A and said electrical pulse B according to the formula:
##EQU2##

6 more elements

Dependencies are inferred from the claim text.

High resolution time interval counter

Life of this patent

High resolution time interval counter

Life of this patent

Abstract

Claims17