Magnetic head driving circuit with delay elements between the switching components

Abstract

A magnetic head driving circuit is provided which has first and second transistors having the bases respectively connected to first and second input terminals and the collectors supplied with a power source voltage, third and fourth transistors having the collectors respectively connected to the emitters of the first and second transistors, and a magnetic head and surge absorbing resistor disposed in a parallel connection with each other between the emitters of the first and second transistors. Delay circuits are respectively disposed between the input terminal and the base of the fourth transistor and between the second input terminal and the base of the third transistor. If there has a time delay in inverting action generated between the first and second transistors, the reverse bias voltage acting between the base and emitter of the first and/or second transistor will be impossible to be increased, so that the switching time of the magnetic head current can be shortened. The magnetic recording density can also be improved.

Dependencies are inferred from the claim text.