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US 5,332,931 AGranted
High speed differential comparator
AssigneeHarris Corporation
InventorsFinbarr J. Crispie, Geert P. Rosseel
Life of this patent
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Abstract
A differential comparator with inputs switched and capacitively coupled to inverters which have capacitive cross-coupling feedback for a latching operation. The inverters also have direct switched feedback for autozeroing. The inputs further have a shorting switch between the input switches and the coupling capacitors for offset compensation. Complementary operation of the switches provides precharge and evaluation phases of operation. During precharge the inputs are applied to the input coupling capacitors and the inverters are autozeroed; during evaluation the inputs are transferred to the inverters through the coupling capacitors and the outputs feedback positively through the cross-coupling capacitors to latch the pair of inverters.
Claims22
A differential comparator comprising:
- a first and a second input terminal for receiving first and second input signals, respectively, which are to be compared;
- first and second amplifying means, each amplifying means having an input and an output and further including selective coupling means for selectively coupling the input and output of the amplifying means for auto-zeroing the amplifying means;
- a first capacitor having a first plate connected to the first input terminal and a second plate connected to the input of the first amplifying means;
- a second capacitor having a first plate connected to the second input terminal and a second plate connected to the input of the second amplifying means;
- a third capacitor connected between the output of the first amplifying means and the input of the second amplifying means;
- a fourth capacitor connected between the output of the second amplifying means and the input of the first amplifying means;
- and
- first selective connecting means for selectively connecting the first plate of the first capacitor to the first plate of the second capacitor.
5 more elements
A differential comparator comprising:
- a first and a second input terminal for receiving first and second input signals, respectively, which are to be compared;
- first and second amplifiers, each amplifier comprising an input and an output which is coupled to a separate output terminal of the differential comparator;
- a feedback network which capacitively couples the output of the first and the second amplifier to the input of the second and the first amplifier, respectively;
- first and second capacitors, each capacitor coupling a separate input terminal of the differential comparator to the input of a separate one of the first and second amplifiers;
- and
- switching means for selectively (a) precharging each of the first and second amplifiers to a separate predetermined value, (b) delivering the first and second input signals to the first and second capacitors, respectively, during a first phase of operation, and (c) isolating the first and second input terminals from the first and second capacitors and placing a short thereacross while releasing the first and second amplifiers from their precharged state during a second phase of operation to provide an indication of which input signal has a greater amplitude.
3 more elements
A differential comparator comprising:
- first and second input terminals for receiving first and second input signals, respectively, which are to be compared;
- first and second amplifiers, each amplifier comprising an input and an output which is coupled to a separate output terminal of the differential comparator;
- a feedback network which capacitively couples the output of the first and the second amplifier to the input of the second and the first amplifier, respectively;
- first and second capacitors, each capacitor coupling a separate input terminal of the differential comparator to the input of a separate one of the first and second amplifiers;
- and
- switching means for selectively (a) precharging each of the first and second amplifiers to a separate predetermined value, and delivering the first and second input signals to the first and second capacitors, respectively, during a first phase of operation, (b) isolating the first and second input terminals from the first and second capacitors, and placing a short across an input terminal of the first and second capacitors while releasing the first and second amplifiers from their precharged state during a second phase of operation, and (c) isolating the first and second capacitors from the input of each of the first and second amplifiers when a latching of the first and second amplifiers has begun during the second phase of operation.
3 more elements
Circuitry comprising:
- first and second inverters each having an input and an output;
- first, second, third, fourth and fifth switches each having first and second terminals;
- first, second, third and fourth capacitors each having first and second terminals;
- a first input circuitry terminal is coupled to the first terminal of the first switch;
- a second input circuitry terminal is coupled to the first terminal of the second switch;
- a second terminal of the first switch is coupled to the first terminals of the first capacitor and the third switch;
- a second terminal of the second switch is coupled to the first terminal of the second capacitor and to the second terminal of the third switch;
- a second terminal of the first capacitor is coupled to the first terminal of the fourth switch, to the first terminal of the fourth capacitor, and to the input of the first inverter;
- a second terminal of the second capacitor is coupled to the first terminal of the fifth switch, to the first terminal of the third capacitor, and to the input of the second inverter;
- the output of the first inverter is coupled to the second terminals of the fourth switch and the third capacitor, and to a first output terminal of the circuitry;
- and
- the output of the second inverter is coupled to the second terminals of the fifth switch and the fourth capacitor, and to a second output terminal of the circuitry.
9 more elements
A method of providing a differential comparison between a first and second input signal comprising the steps of:
- (a) during a first phase of operation, precharging an input and output of each of a first and second amplifier to a predetermined value while storing a differential value between the first and second input signals and the precharged values of the inputs of the first and second amplifier, respectively, on a respective first and second capacitor;
- (b) concurrent with step (a), storing any voltage differential between the precharged value of the output of the first and second amplifiers and the input of the second and first amplifiers, respectively, in a separate respective third and fourth capacitor of a feedback network;
- (c) during a second phase of operation, releasing the first and second amplifiers from their precharged state while isolating the first and second capacitors from receiving the first and second input signals, respectively;
- (d) concurrent with step (c), placing a short circuit across first terminals of the first and second capacitors so as to prevent these capacitors from receiving the first and second input signals;
- and
- (e) generating at the outputs of the first and second amplifiers an indication of which of the first and second input signals has a greater amplitude.
3 more elements
Dependencies are inferred from the claim text.