Method for structuring a layer using a ring electrode and multiple RF power sources
AssigneeSiemens Aktiengesellschaft
InventorManfred Engelhardt
Life of this patent
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Abstract
Method for structuring a layer. For structuring a layer that is arranged on a lower layer of a different material using a plasma etching process, a target (14) of the material of the lower layer is arranged in an etching reactor (1). The etching process is managed such that material is sputtered from the target (14) and is deposited on surfaces of the lower layer exposed in the etching process to essentially the same degree to which the lower layer is eroded by the etching process. The method is particularly suited for structuring a polysilicon layer that is arranged on a gate oxide layer.
Claims19
A method for structuring a layer, comprising the steps of:
- implementing an anisotropic plasma etching process in an etching reactor having at least one wafer holder and a ring electrode that annularly surrounds the wafer holder, two RF power sources of different frequencies being supplied independently of one another via the wafer holder and via the ring electrode, respectively;
- introducing into the etching reactor a substrate having a layered structure that contains at least one lower layer composed of a first material different from a second material of the layer to be structured and that contains the layer to be structured;
- providing a target that contains the first material of the lower layer in the etching reactor;
- setting the RF power at the ring electrode such that the first material is sputtered from the target and such that the first material deposits on surfaces of the lower layer that are exposed during the etching process to substantially the same degree to which the lower layer is attacked by the etching process.
A method for structuring a layer, comprising the steps of:
- providing an etching reactor having at least one wafer holder and a ring electrode that annularly surrounds the wafer holder;
- implementing an anisotropic plasma etching process in the etching reactor;
- supplying two RF power sources of different frequencies independently of one another via the wafer holder and via the ring electrode, respectfully;
- providing an etching gas in the etching chamber;
- introducing into the etching reactor a substrate having a layered structure that contains at lest one lower layer composed of a first material different from a second material of the layer to be structured and that contains the layer to be structured;
- providing a target that contains the first material of the lower layer in the etching reactor;
- setting the RF power at the ring electrode such that the first material is sputtered from the target and such that the first material deposits on surfaces of the lower layer that are exposed during the etching process to substantially the same degree to which the lower layer is attacked by the etching process.
A method for structuring a polysilicon layer on a lower layer of SiO.sub.2, comprising the steps of:
- providing an etching reactor having at least one wafer holder and a ring electrode that annularly surrounds the wafer holder;
- supplying two RF power sources of different frequencies independently of one another via the wafer holder and via the ring electrode, respectfully;
- providing an etching gas of Cl.sub.2 in the etching reactor at a pressure of approximately 2 mTorr and at a throughput of 20 sccm;
- introducing into the etching reactor a substrate having a layered structure that contains at least a lower layer composed of SiO.sub.2 and that contains the layer to be structured;
- providing a target that contains SiO.sub.2 in the etching reactor;
- setting RF power to the ring electrode at approximately 1000 Watts at a frequency of approximately 13.56 MHz;
- setting RF power to the wafer holder at approximate 50 Watts at a frequency of approximately 100 kHz for approximately 10 seconds to remove a thin SiO.sub.2 layer;
- resetting the RF power to the wafer holder at approximately 30 Watts for approximately 60 seconds to etch the polysilicon layer;
- and
- resetting the RF power to the wafer holder to approximately 15 Watts for approximately 90 to 120 seconds to remove etching residue of polysilicon by over-etching;
- wherein the RF power at the ring electrode is set such that the SiO.sub.2 is sputtered from the target and such that the SiO.sub.2 deposits on surfaces of the lower layer that are exposed during the etching process to substantially the same degree to which the lower layer is attacked by the etching process.
Dependencies are inferred from the claim text.