Running-average/decimation filter for an oversampling A/D converter

A running-average filter for producing a filter output by integrating an input digital signal in accordance with an integration phase and computing a running average of said input digital signal, said running-average filter comprising:

• a filter processing unit for processing said input digital signal in a predetermined integration-phase state and producing a plurality of processing results;
• a compensation circuit for acquiring, in response to a timing signal, compensation information representing a difference in magnitude between one of the processing results with an integration phase lagging behind or leading ahead of said predetermined integration-phase state and another of the processing results with an unchanged integration phase from a predetermined node of said filter processing unit with predetermined timing and supplying said compensation information to another predetermined node of said filter processing unit;
• and
• a control circuit for receiving external phase-change information indicating a leading-phase state and a lagging-phase state and, in accordance with said leading-phase and lagging-phase states, generating the timing signal for determining said predetermined timing.

Apparatus, comprising:

• an oversampling-type A/D converter circuit for sampling an input analog signal in accordance with a predetermined sampling clock signal and converting said input analog signal into digital data;
• a running-average filter for inputting said digital data, a filter processing unit for processing input digital data in a predetermined integration-phase state and producing a plurality of processing results, a compensation circuit for receiving the processing results an computing a difference in magnitude between one of the processing results with an integration phase lagging behind or leading ahead of said predetermined integration-phase state and another of the processing results with an unchanged integration phase, and an adder for selectively adding said difference to said one of the processing results for producing a filter output in accordance with external phase-change information;
• and
• a digital phase locked loop circuit for synchronizing a phase of said sampling clock signal with a phase of the processing results and generating the external phase-change information supplied to said running-average filter based on said processing results produced by said running-average filter.

A filter which receives a plurality of input signals in a serial manner and which provides an output signal in accordance with the plurality of input signals, comprising:

• filter processing means for providing a first output and a second output on a first timing and a second timing in accordance with a plurality of first ones and second ones of the input signals respectively, in a serial manner, the second timing being a different timing from the first timing;
• compensation means coupled to said filter processing means for providing a difference between the first output and the second output;
• and
• addition means, coupled to said filter processing means and to said compensation means, and for selectively adding the difference from said compensation means to the first output in response to an information.