Electrically and thermally enhanced integrated-circuit package
AssigneeVLSI Technology, Inc.
InventorsSang S. Lee, William M. Loh
Life of this patent
Estimating the term…
Loading patent…
AssigneeVLSI Technology, Inc.
InventorsSang S. Lee, William M. Loh
Estimating the term…
An encapsulated electrically and thermally enhanced integrated circuit is disclosed. An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate. A lead frame having inwardly-extending bonding fingers has the bottom sides thereof attached to the top of the substrate. A contiguous layer of insulating material is bonded to the top sides of the bonding fingers, such that the layer of insulating material peripherally surrounds the integrated-circuit die. A conductive layer of material is then bonded to the top of the insulating layer. A second layer of insulating material followed by a second conductive layer may be bonded on top of the first conductive layer. Electrical connections are made from the integrated-circuit die to the conductive layers surrounding the die. The device is then encapsulated in a plastic material.
An plastic encapsulated electrically and thermally enhanced integrated circuit comprising:
An improved thermally-enhanced package assembly for an integrated-circuit die packaged in a molded plastic package, comprising:
A plastic encapsulated electrically and thermally enhanced integrated-circuit package, comprising:
Dependencies are inferred from the claim text.