A/D converter

An A/D converter comprising a channel selector for selecting one of a plurality of channels having analog input signals, a comparator for comparing the voltage of the analog input signal of a channel selected by said channel selector and a sequentially changing reference voltage, a conversion result storage register for storing the comparison result of said comparator as the result of A/D conversion, a channel selection register for storing channel selection information for said channel selector to select one of the channels, and a mode register for storing mode information such as starting factors, A/D conversion speed and A/D conversion operation modes, wherein, when there are a plurality of starting factors, the same number of said channel selection registers, mode registers and conversion result storage registers as the number of said starting factors are provided and divided into groups, according to the types of said starting factors, each consisting of a channel selection register, a mode register and a conversion result storage register;

• and a control circuit for specifying a register group for a starting factor when the factor is generated and an interrupt request signal generator circuit for generating an interrupt request signal indicative of the completion of A/D conversion for each starting factor are also provided.

An A/D converter comprising a channel selector for selecting one of a plurality of channels having analog input signals, a comparator for comparing the voltage of the analog input signal of a channel selected by said channel selector and a sequentially changing reference voltage, a conversion result storage register for storing the comparison result of said comparator as the result of A/D conversion, a channel selection register for storing channel selection information for said channel selector to select one of the channels, and a mode register for storing mode information such as starting factors, A/D conversion speed and A/D conversion operation modes, wherein, when there are a plurality of starting factors, the same number of said channel selection registers, mode registers and conversion result storage registers as the number of said starting factors are provided and divided into groups, according to the types of said starting factors, each consisting of a channel selection register, a mode register and a conversion result storage register;

• and a control circuit for specifying a register group for a starting factor when the factor is generated determines the weight of a given starting factor and controls said register group selector for selecting a register group according to the result of this decision.