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US 5,331,225 AGranted
BiCMOS logic circuit with bipolar transistor and MOS transistor formed on the same semiconductor substrate
AssigneeKabushiki Kaisha Toshiba
InventorsMasataka Matsui, Yukihiro Urakawa
Life of this patent
Estimating the term…
Abstract
In a Bi-CMOS logic circuit in which a bipolar transistor and a CMOS element are formed on the same semiconductor substrate, a pull-down current of an output circuit is discharged through a MOS transistor having a large transconductance gm and a constant current source having a large current value. Thus, the speed of a pull-down operation is increased. Moreover, a constant current source need not be provided in an output circuit, and the MOS transistor is operated when it is required during a pull-down operation, thereby reducing an extra current. Therefore, a circuit having low power consumption can be obtained.
Claims5
A logic circuit comprising:
- a bipolar differential circuit for obtaining first and second differential circuit outputs which are complementary to each other, said bipolar differential circuit having a terminal that is directly connected to a constant current source;
- a first output circuit for obtaining a first output circuit output between a first bipolar transistor having the first differential circuit output as a control input and a first MOS transistor having the second differential circuit output as a control input, said first bipolar transistor and said first MOS transistor being connected in series with each other between said constant current source and a power source of said bipolar differential logic circuit;
- and
- a second output circuit for obtaining a second output circuit output complementary to the first output circuit output between a second bipolar transistor having the second differential circuit output as a control input and a second MOS transistor having the first differential circuit output as a control input, said second bipolar transistor and said second MOS transistor being connected in series with each other between said constant current source and said power source.
1 more element
A logic circuit comprising:
- a first bipolar transistor of a first polarity having abase for receiving a first input;
- a second bipolar transistor of a first polarity having a base receiving a second input which is an inverted input of the first input and an emitter connected to an emitter of said first bipolar transistor to form an emitter node;
- a first resistor element having one terminal connected to a first potential power source and the other terminal connected to a collector of said first bipolar transistor;
- a second resistor element having one terminal connected to said first potential power source and the other terminal connected to a collector of said second bipolar transistor;
- a third bipolar transistor of the first polarity having a collector connected to said first potential power source, a base connected to the collector of said first bipolar transistor, and an emitter serving as a first output;
- a fourth bipolar transistor of the first polarity having a collector connected to said first potential power source, a base connected to the collector of said second bipolar transistor, and an emitter serving as a second output inverted to the first output;
- a first MOS FET of a first conductivity type having a gate connected to the collector of said second bipolar transistor, a source connected to the emitter of said first bipolar transistor, and a drain serving as the first output;
- a second MOS FET of the first conductivity type having a gate connected to the collector of said first bipolar transistor, a source connected to the emitter of said second bipolar transistor, and a drain serving as a second output;
- and
- a constant current source provided between the said emitter node of said first and second bipolar transistors and a second potential power source.
7 more elements
A logic circuit comprising:
- a first bipolar transistor of a first polarity having a base for receiving a first input;
- a second bipolar transistor of a first polarity having a base receiving a second input which is a reference input and an emitter connected to an emitter of said first bipolar transistor to form an emitter node;
- a first resistor element having one terminal connected to a first potential power source and the other terminal connected to a collector of said first bipolar transistor;
- a second resistor element having one terminal connected to said first potential power source and the other terminal connected to a collector of said second bipolar transistor;
- a third bipolar transistor of the first polarity having a collector connected to said first potential power source, a base connected to the collector of said first bipolar transistor, and an emitter serving as a first output;
- a fourth bipolar transistor of the first polarity having a collector connected to said first potential power source, a base connected to the collector of said second bipolar transistor, and an emitter serving as a second output inverted to the first output;
- a first MOS FET of a first conductivity type having a gate connected to the collector of said second bipolar transistor, a source connected to the emitter of said first bipolar transistor, and a drain serving as the first output;
- a second MOS FET of the first conductivity type having a gate connected to the collector of said first bipolar transistor, a source connected to the emitter of said second bipolar transistor, and a drain serving as a second output;
- and
- a constant current source provided between said emitter node of said first and second bipolar transistors and a second potential power source.
7 more elements
Dependencies are inferred from the claim text.