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AssigneeNEC Corporation
InventorHideo Tsuiki
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A sequential access type memory medium of a large memory capacity is composed of a number of semiconductor memory modules, each including a semiconductor memory device and necessary peripheral circuits accommodated in a square package. The same number of terminals are provided on each of four sides of the square package. The terminals on the four sides are so wired that the same kind of signal is transferred through positionally corresponding terminals of four sides of the square package, and the terminals on one side are of a plug type and the terminals on the remaining three sides are of a socket type which can be fitted and connected with the plug type terminal so as to interconnect corresponding signal lines. In addition, positionally corresponding socket type terminals of three sides of each memory module are interconnected so as to interconnect the terminals for the same signal. Thus, a plurality of memory modules are interconnected in an arbitrary order and in arbitrary location with using no printed circuit board and with a high expandability, so that in each semiconductor memory module, an address signal is generated on the basis of the synchronous signal supplied from an external, and the synchronous signal is supplied to the just succeeding semiconductor memory circuit after the data reading of the first mentioned semiconductor memory circuit has been completed.
A semiconductor memory circuit comprising a semiconductor memory device, a read-out controller generating on the basis of a synchronous signal supplied from an external an address signal to said semiconductor memory device for the purpose of reading out data from said semiconductor memory device, said read-out controller also generating a read end signal when the reading of the data from said read-out controller has been complete a feed-out means receiving the data read out from said semiconductor memory device for outputting the received data, a first gate means receiving the data outputted from said feed-out means and data from an external for outputting a selected one of the received two data, a feed-out control means receiving said read end signal for generating a feed-out control signal, a second gate means responding to said feed-out control signal to control said read-out control means so as to stop the generation of said address signal supplied to said semiconductor memory device, and a third gate means responding to said feed-out control signal to start to supply said synchronous signal to an external.
A semiconductor memory module comprising:
An acoustic signal reproducing system including:
Dependencies are inferred from the claim text.