DC level control circuitry for CCD images

An analog signal processor (ASP) comprising:

• a first section for receiving pixel image signals from a CCD unit, the first section having circuit means for correlated double sampling of the pixel image signals, and for differentially sampling and holding values of the pixel signals and of a first reference voltage as respective stored analog voltages;
• a second section for receiving the stored analog voltages, the second section having amplifier means for differentially combining the stored analog voltages and for providing an output signal, the second section having an adjustable gain control and having a feedback signal input for adjusting a d.c. zero dark level of the output signal;
• a third section for receiving an output signal from the second section and for providing an output signal at low impedance;
• a fourth section being adapted to receive an output signal and to apply a compensating signal to the feedback signal input of the second section;
• the fourth section having feedback means for referencing the zero level of the output signal against a second reference voltage and for adjusting the compensating signal by servo action to maintain a desired balance between the second reference voltage and the zero dark level such that the pixel image signals can be accurately sampled over a wide range of sample rates, the gain of the second section is adjustable and the zero dark level of the output signal is determined independently of the gain;
• and
• the four sections of the ASP being adapted to be implemented as a single integrated circuit.

An analog signal processor (ASP) comprising:

• first, second, third, and fourth sections;
• the first section comprises:
• a series coupling capacitor one terminal thereof which is connected to receive pixel signals from the CCD unit;
• a clamping switch adapted to momentarily connect the other side of the coupling capacitor to a voltage terminal at which a first reference voltage is applied;
• first and second storage capacitors;
• first and second sample switches being operated together, the first sample switch being connected to apply a momentary sample of the pixel signals received from a second terminal of the coupling capacitor across the first storage capacitor, and the second sample switch being connected to momentarily apply the first reference voltage at the voltage terminal across the second storage capacitor;
• and
• circuit means for applying the respective analog voltages stored on the first and second storage capacitors to the second section, the clamping switch being adapted to momentarily close when the first and second sample switches are open, and to open when the first and second sample switches are closed;
• and
• the first and second storage capacitors being essentially of the same capacitance;
• the second section comprises a differential voltage to differential current input stage, a Gilbert gain cell, and a differential current to single-ended voltage output driver;
• the third section comprises a multiplex unit and an inverter amplifier, the multiplex unit having a first input terminal for receiving the output signals from the second section, and having a second terminal to which is applied a second reference voltage;
• the multiplex unit being adapted to apply output signals thereof to the inverter amplifier during horizontal readout of the pixel signals from the CCD unit, and to apply the second reference voltage to the inverter amplifier during the vertical to horizontal line transfer in the CCD unit;
• The inverter amplifier being adapted to provide an output signal, the polarity of which is opposite to the polarity of the pixel image signals from the CCD unit;
• the fourth section comprises a feedback loop with an amplifier having an output, a storage capacitor and a switch connected between the output and the storage capacitor, and an input for a third reference voltage;
• and
• the amplifier having an input connected to receive an image signal whose dark level is to be set at a desired zero level, and the amplifier being adapted to generate at an output thereof a compensating voltage which is stored in the storage capacitor and is periodically refreshed by the momentary closing of the switch, the compensating voltage being applied to the second section to reference the dark zero level of the output signals to the third reference voltage.

An electronic color image system in which a photo-imaging unit provides a plurality of color-component pixel image signals, the electronic color image system comprising:

• a plurality of analog signal processors (ASP's) which are substantially identical and which are operated in unison, each ASP being connected to receive a respective one of the color-component pixel image signals and for providing an amplified color-component output image signal to be combined into a full color image with white balance and uniform dark background level;
• each ASP comprises:
• a first section for receiving the pixel image signals from the imaging unit, the first section comprising circuit means for correlated double sampling of the pixel image signals, and for differentially sampling and holding values of the pixel signals and of a first reference voltage as respective stored analog voltages;
• a second section for receiving the stored analog voltages, the second section comprises amplifier means for differentially combining the stored analog voltages and for providing an output signal, the second section having an adjustable gain control and having a control signal input for adjusting a d.c. zero dark level of the output signal;
• and
• a third section for receiving an output signal and for applying an offset signal to the control signal output of the second section, the third section having feedback means for referencing the zero level of the output signal against a second reference voltage and for adjusting the offset signal by servo action to maintain a desired balance between the second reference voltage and the zero dark level such that the pixel image signals can be accurately sampled over a wide range of sample rates, the gain of the second section being adjustable and the zero dark level of the output signal being determined independently of the gain.

An electronic color image system in which a photo-imaging unit provides a plurality of color-component pixel image signals, the electronic color image system comprising:

• a plurality of analog signal processors (ASP's) which are substantially identical and which are operated in unison, each ASP being connected to receive a respective one of the color-component pixel image signals and for providing an amplified color-component output image signal to be combined into a full color image with white balance and uniform dark background level;
• each ASP comprises:
• a first section for receiving the pixel image signals from the imaging unit, the first section comprises switched circuit means for correlated double sampling of the pixel image signals, and switched sample means for differentially sampling and holding values of the pixel signals and of a first reference voltage as respective stored analog voltages, the switched circuit means being controlled by first control signals, the switched sample means being controlled by second control signals;
• a second section for receiving the stored analog voltages, the second section having amplifier means for differentially combining the stored analog voltages from the first section and for providing an output signal, and the second section having an adjustable gain control and having a feedback signal input for adjusting a d.c. zero dark level of the output signal;
• a third section having a multiplex unit and an inverter amplifier, the multiplex unit having a first input terminal for receiving the output signals from the second section, and having a second terminal to which is applied a second reference voltage;
• the multiplex unit being adapted to apply the output signals thereof to the inverter amplifier during horizontal readout of the pixel signals from the CCD unit, and to apply the second reference voltage to the inverter amplifier during the vertical to horizontal line transfer in the CCD unit;
• the inverter amplifier being adapted to provide an output signal the polarity of which is opposite to the polarity of the pixel image signals from the CCD unit;
• and
• a fourth section for receiving an output signal from the third section and for applying an offset voltage to the feedback signal input of the second section, the fourth section having switched feedback means for referencing the zero level of the output signal against a third reference voltage and for adjusting the offset voltage by servo action to maintain a desired balance between the second reference voltage and the zero dark level;
• the switched feedback means being controlled by third control signals;
• and
• each ASP having applied to it the first, second, and third control signals, such that the pixel image signals can be accurately sampled over a wide range of sample rates, the gain of the second section is adjustable and the zero dark level of the low impedance output signals is determined independently of the gain.