Circuit and method of setting a bias point for a single-ended ampliifier during power-up
AssigneeMotorola, Inc.
InventorJohn K. Mahabadi
Life of this patent
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Abstract
An amplifier circuit receives biasing during power-up to reduce propagation delay. A start-up circuit generates first and second control signals upon detecting the power supply potential to the amplifier below a predetermined threshold. The control signals enable a biasing circuit to establish a bias potential at the input of the amplifier. After the power supply potential reaches the predetermined threshold, the control signals from the start-up circuit change state to disable the biasing circuit and allow the amplifier to operate normally.
Claims10
An amplifier circuit having an input responsive to an input signal for providing an output signal, comprising:
- first means for generating first and second control signals upon detecting a first power supply potential below a predetermined threshold, said first and second control signals having opposite phase;
- and
- second means responsive to said first and second control signals for establishing a bias potential at the input of the amplifier, said second means including,
- (a) a first transistor having a gate, a source and a drain, said source receiving said first power supply potential, said gate receiving said first control signal,
- (b) a second transistor having a gate, a source and a drain, said source being coupled to said drain of said first transistor, said gate and drain being coupled together to the input of the amplifier circuit for establishing said bias potential,
- (c) a third transistor having a gate, a source and a drain, said gate and drain being coupled together to the input of the amplifier circuit, and
- (d) a fourth transistor having a gate, a source and a drain, said drain being coupled to said source of said third transistor, said gate receiving said second control signal from said first means, said source receiving a second power supply potential.
An amplifier circuit having an input responsive to an input signal for providing an output signal, comprising:
- first means for generating a first control signal upon detecting a first power supply potential below a predetermined threshold;
- a first transistor having a gate, a source and a drain, said source receiving said first power supply potential, said gate receiving said first control signal;
- a second transistor having a gate, a source and a drain, said source being coupled to said drain of said first transistor, said gate and drain being coupled together to the input of the amplifier circuit for establishing a bias potential;
- a third transistor having a gate, a source and a drain, said gate and drain being coupled together to the input of the amplifier circuit;
- and
- a fourth transistor having a gate, a source and a drain, said drain being coupled to said source of said third transistor, said gate receiving a second control signal from said first means, said source receiving a second power supply potential.
Dependencies are inferred from the claim text.