US 5,329,202 AGranted

Large area ultrasonic transducer

AssigneeAdvanced Imaging Systems, Inc.

InventorsGeorge F. Garlick, Todd F. Garlick

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Abstract

The description details a preferred embodiment of an improved large area ultrasonic transducer 70 capable of reducing the generation of adverse "edge effect" waves. The transducer has a thin piezoelectric wafer 72 that has a high area-to-thickness ratio of preferably between 30 and 300. A front electrode coating 84 is deposited on the front surface 74, over the front edge 77, along the side surface 82 and over the back edge 78 and onto a border of the back surface 76 to minimize the application of a voltage potential along the side surface. A voltage modifying layer 92 is placed on the back surface 76 along the back edge 78 for further minimizing the generation of "edge effect" waves. The layer 92 varies in thickness to progressively decrease the voltage applied to the back surface 76 from a large central area 79(a) to the back edge 78. The layer 92 is preferably composed of a non-piezoelectric dielectric material.

Claims22

Dependent claims

An improved ultrasonic transducer for generating planar ultrasonic waves with reduced edge effect interference, comprising:

a) a thin piezoelectric wafer body having parallel front and back surfaces extending to peripheral front and back edges interconnected by a peripheral surface;
b) a front electrode layer covering the front surface;
c) a back electrode layer covering the back surface;
d) a voltage reduction layer composed of a non-piezoelectric dielectric material interposed between the back surface of the piezoelectric wafer and the back electrode coating along the periphery of the back edge to reduce the effective voltage applied to the piezoelectric wafer adjacent the peripheral surface and thereby reduce the generation of adverse edge effect ultrasonic waves;
e) electrode connector tabs separately affixed to the electrode layers for enabling an oscillating electrical voltage to be applied between the front and rear electrode coatings of the piezoelectric wafer to generate ultrasonic plane waves from the front surface while minimizing the generation of interfering edge effect ultrasonic waves from peripheral surface;
and
f) wherein the voltage reduction layer has a varying thickness to progressively reduce the voltage applied to the back surface to a minimum adjacent the back edge.

4 more elements

Dependencies are inferred from the claim text.