Termination circuit
AssigneeInternational Business Machines Corporation
InventorsRyo Igarashi, Tatsuo Morikawa
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsRyo Igarashi, Tatsuo Morikawa
Estimating the term…
A termination circuit having a large margin which prevents the occurrence of a reflected wave due to a noise at the far end of a transmission line, thereby reducing the power consumption in the termination impedance. The termination circuit is constructed such that a first transistor is connected to a first potential and a second transistor is connected to a second potential which constitute the output stage of the termination circuit. The transistors are driven by first and second inverters having different input/output characteristics, respectively, thereby increasing the operation margin of the termination circuit. Particularly, if the second potential is assumed to be lower than the first potential, the second inverter driving the second transistor has such input/output characteristics that it outputs an output voltage which turns off the second transistor before the first inverter turns on the first transistor as the input voltage increases.
A termination circuit comprising:
Dependencies are inferred from the claim text.