Method and apparatus for feedback control of I/O characteristics of digital interface circuits
AssigneeNational Semiconductor Corporation
InventorThomas P. Redfern
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AssigneeNational Semiconductor Corporation
InventorThomas P. Redfern
Estimating the term…
A transceiver network having a driver and a receiver circuit for providing an interface between, for example, a data bus and a system controller or the like is disclosed herein. The receiver circuit includes a first logic gate of a first predefined type for providing output signals in response to input signals in accordance with a first transfer characteristic governed by a first reference voltage. A compensation arrangement is provided for adjusting the first reference voltage, and includes a first compensation gate of the first predefined type having an output governed by the first reference voltage. A first feedback loop coupled to the first compensation gate's output varies the first reference voltage until the first compensation gate generates a predefined output signal. The driver network includes a second input logic gate of a second predefined type having a first current transfer characteristic governed by a gate control voltage. A second compensation arrangement adjusts the gate control voltage, and includes a second compensation gate of the second predefined type having a current transfer characteristic proportional to the first current transfer characteristic. A second feedback loop coupled to the second compensation gate varies the gate control voltage until current flowing through the second compensation gate matches a supply current.
A receiver interface circuit comprising:
A driver interface circuit comprising:
In a driver interface circuit including a first logic gate of a predefined type having a first current transfer characteristic governed by a gate control voltage, said logic gate being of a first size, a method of reducing variation in said first current transfer characteristic comprising the steps of:
A transceiver network comprising:
A driver interface circuit comprising:
Dependencies are inferred from the claim text.