Voltage dropping circuit for semiconductor device

A voltage dropping circuit mounted on a semiconductor device for controlling a voltage supplied to a DRAM, comprising:

• a control unit for producing for a predetermined period a reference voltage set to one half of a supply voltage connected thereto with a bias circuit comprising first and second resistors having equal values and first and second transistors;
• an output unit for outputting to the DRAM a predetermined voltage having a value half of said supply voltage by level shifting said reference voltage produced by said control unit with an output circuit comprising first and second complementary transistors;
• a timer circuit for generating a driving pulse which becomes an active signal intermittently;
• and
• a switching circuit for utilizing said driving pulse from said timer circuit to switch said supply voltage supplied to said control unit, said switching circuit simultaneously suspends said control unit and said output unit when said driving pulse fails to provide said active signal to hold a high impedance and cut said predetermined voltage supplied to the DRAM, and when said output unit supplied said predetermined voltage to the DRAM, said switching circuit intermittently switch said control unit with said driving pulse transmitted from said timer circuit to decrease the power consumed by said control unit, said output unit and the DRAM.