Method of doping gate electrodes discretely with either P-type or N-type impurities to form discrete semiconductor regions

A method of manufacturing a semiconductor device on a semiconductor substrate having a first insulating film on a first semiconductor region of P-type and a second semiconductor region of N-type formed on said semiconductor substrate, comprising the steps of:

• (a) forming a first conductor layer comprising a laminate film including a polysilicon layer and a silicide layer thereon, said first conductive layer extending continuously from said first semiconductor region to said first insulating film, said first conductive layer having first end portion on said first insulating film;
• (b) forming a second conductive layer comprising a laminate film including a polysilicon layer and a silicide layer thereon, said second conductive layer extending continuously from said second semiconductor region to said first insulating film, said second conductive layer having a first end portion on said first insulating film, wherein said first end portion of said second conductive layer is adjacent to and opposing said first end portion of said first conductive layer;
• (c) forming a first mask layer over at least a part of said second semiconductor region, with an end portion thereof formed between said first end portion of said first conductive layer and said first end portion of said second conductive layer, said end portion of said first mask layer being formed over said first insulating film;
• (d) introducing first impurities of the N-type into said first semiconductor region which is not covered with said first mask layer, thereby to form third semiconductor regions as in self-alignment manner with said first conductive layer;
• (e) forming a second mask layer over at least a portion of said first semiconductor region, with an end portion thereof formed between said first end portion of said first conductive layer and said first end portion of said second conductive layer, said end portion of said second mask layer being formed over said first insulating film;
• and
• (f) introducing second impurities of P-type into said second semiconductor region which is not covered with said second mask layer, thereby to form fourth semiconductor regions in self-alignment manner with said second conductive layer.