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US 5,327,565 AGranted
Data processing apparatus
AssigneeNEC Corporation
InventorHajime Sakuma
Life of this patent
Estimating the term…
Abstract
A macroservice engine is provided to exclusively carry out a sequence control in a processing of a macroservice. On the other hand, a command execution unit carries out no macroservice, but generates a bus cycle exciting request for a bus control unit, when an access request signal is generated to access a memory or peripheral registers included in a microcomputer. Thus, a processing of interruption is carried out with high speed, and a burden of a central processing unit is relieved in an interruption process.
Claims4
A data processing apparatus, comprising:
- a central processing unit for carrying out a predetermined logic calculation to control peripheral circuits;
- an interruption controller for generating a processing request signal in response to an interruption request signal;
- a data control unit connected to receive said processing request signal and carrying out a sequence control of a predetermined processing in response to said processing request signal, said data control unit generating an access request signal to said central processing unit;
- a memory for storing predetermined processing information including an address of a specified register of a peripheral register set relating to said peripheral circuits, an address of a specified memory region of said memory, and a specified processing information;
- and
- means for accessing a predetermined space of said memory directly from said data control unit;
- wherein said data control unit accesses said peripheral register set and said memory in accordance with said addresses of said specified register and memory region when said access request signal is generated, and carries out said predetermined processing in accordance with said specified processing information.
4 more elements
Dependencies are inferred from the claim text.