Semiconductor integrated circuit containing an automatic equalizer including a circuit for periodically updating a plurality of tap coefficients at varying frequencies

A semiconductor integrated circuit comprising:

• a digital signal processor incorporated in a single semiconductor chip, said digital signal processor including an automatic equalizer having:
• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein the frequency at which said updating means updates said tap coefficients is varied depending on the respective magnitudes of said tap coefficients.

An automatic equalizer comprising:

• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein said tap coefficients comprise a plurality of tap coefficient groups, and wherein one group of tap coefficients is updated in each sampling period and other groups of tap coefficients are updated in predetermined multiples of sampling periods.

A semiconductor integrated circuit comprising:

• a digital signal processor incorporated in a single semiconductor chip, said digital signal processor including an automatic equalizer having:
• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein said tap coefficients comprise a plurality of tap coefficient groups, and wherein one group of tap coefficients is updated in each sampling period and other groups of tap coefficients are updated in predetermined multiples of sampling periods.

An automatic equalizer comprising:

• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein said tap coefficients comprise a plurality of tap coefficient groups, and wherein a first group of tap coefficients is updated at a first frequency and a second group of tap coefficients is updated at a second frequency that is lower than the first frequency, said first and second frequencies being determined in accordance with the respective magnitudes of said tap coefficients.

A semiconductor integrated circuit comprising:

• a digital signal processor incorporated in a single semiconductor chip, said digital signal processor including an automatic equalizer having:
• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein said tap coefficients comprise a plurality of tap coefficient groups, and wherein a first group of tap coefficients is updated at a first frequency and a second group of tap coefficients is updated at a second frequency that is lower than the first frequency, said first and second frequencies being determined in accordance with the respective magnitudes of said tap coefficients.

An automatic equalizer comprising:

• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• and
• comparing means for comparing absolute values of said tap coefficients with a predetermined value;
• wherein the frequency at which said updating means updates said tap coefficients is varied depending on the respective results of comparisons performed by said comparing means.

A semiconductor integrated circuit comprising:

• a digital signal processor incorporated in a single semiconductor chip, said digital signal processor including an automatic equalizer having:
• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• and
• comparing means for comparing absolute values of said tap coefficients with a predetermined value;
• wherein the frequency at which said updating means updates said tap coefficients is varied depending on the respective results of comparisons performed by said comparing means.

In an echo canceler-type transmitting device for data transmission, an automatic equalizer comprising:

• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein the frequency at which said updating means updates said tap coefficients is varied depending on the respective magnitudes of said tap coefficients.

In an image processing system, an automatic equalizer comprising:

• means for inputting a plurality of input sampling signals;
• means for multiplying each of said plurality of sampling signals by a respective tap coefficient;
• an adding circuit for adding together the sampling signals multiplied by said tap coefficients;
• and
• updating means for periodically updating said tap coefficients on the basis of the signal output supplied by said adding circuit;
• wherein the frequency at which said updating means updates said tap coefficients is varied depending on the respective magnitudes of said tap coefficients.