Viterbi trellis coding methods and apparatus for a direct access storage device
AssigneeInternational Business Machines Corporation
InventorsLyle J. Fredrickson, James W. Rae
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Abstract
Viterbi trellis coding methods and Viterbi detector apparatus are provided for detecting trellis coded data. A systolic array Viterbi detector recursively calculates path metrics and partial sums of metric update equations to determine codeword sequences having minimum mean squared error for Viterbi-type maximum-likelihood data detection. The systolic array Viterbi detector is arranged to eliminate redundant calculations and simplify hardware requirements. Modified butterfly trellis geometries and rotating state metrics arrangements are provided for simplifying the Viterbi detector.
Claims12
Viterbi detector apparatus comprising:
- means for sequentially receiving consecutive trellis coded data samples;
- said trellis coded data having a preselected number S of allowed states and predefined allowed state transitions;
- systolic array add, compare and select (ACS) means responsive to received consecutive trellis coded data samples for recursively calculating and storing path metrics and partial sums of metric update equations for each state to select one of said states having minimum error;
- said systolic array add, compare and select (ACS) means includes S latches, each latch being used alternately for storing said calculated path metrics and partial sums:
- and
- path history means for storing said sequentially selected states for each state of said preselected number of allowed states.
A viterbi trellis coding method for processing digital data used with partial-response PR channel in a direct access storage device comprising the steps of:
- encoding binary data into trellis coded data, said encoded trellis data having a preselected number of allowed states and predefined allowed state transitions;
- applying said trellis coded data to the PR channel for writing data;
- receiving an output signal sequence from said PR channel for data readback;
- and
- utilizing a systolic array Viterbi detector for calculating maximum-likelihood received sequences, said systolic array Viterbi detector recursively calculating metric update equations;
- wherein alternating polarity channel output samples are sequentially applied to said systolic array Viterbi detector.
Viterbi detector apparatus comprising:
- means for sequentially receiving consecutive trellis coded data samples;
- said trellis coded data having a preselected number S of allowed states and predefined allowed state transitions;
- systolic array add, compare and select (ACS) mean responsive to received consecutive trellis coded data samples for recursively calculating and storing path metrics and partial sums of metric update equations for each state to select one of said states having minimum error;
- and
- path history means for storing said sequentially selected states for each state of said preselected number of allowed states, said path history means including S path memory blocks, each path memory being loaded with one of two alternative path histories with each selected state;
- wherein said path history means includes alternating shift registers with parallel loading capability and parallel registers each with a multiplexer selecting each input data bit, said alternating shift registers and parallel registers being interconnected in a ring.
Dependencies are inferred from the claim text.