Page-mode type memory writing control circuit using end-of-page address
AssigneeKabushiki Kaisha Toshiba
InventorsYoshihisa Sugiura, Yoshihisa Iwata, Masaki Momodomi, Yasuo Itoh, Tomoharu Tanaka, Yoshiyuki Tanaka
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Abstract
A NOR operation is performed on the address bit by bit by a NOR circuit, and when the final address in a page is detected from the result of the NOR operation by a final address detection circuit, a program starting circuit executes data writing to a memory cell. This can ensure detection of the final address in a page without using a counter circuit. It is therefore possible to simplify the structure of the final address detection circuit and reduce the circuit area occupying in a semiconductor memory device.
Claims5
A semiconductor memory device comprising:
- a non-volatile semiconductor memory device writable page by page;
- a logic circuit applied with address signals for detecting a final address in a page and generating a final address signal when said final address has been detected;
- and
- a write circuit responsive to said logic circuit for writing data into said non-volatile semiconductor memory device in accordance with whether said final address signal has been generated.
A semiconductor memory device comprising:
- a non-volatile semiconductor memory device writable page by page;
- a NOR circuit for performing a NOR operation on a page address signal from an address buffer and generating a final address detection signal;
- a final address detection circuit for receiving said final address detection signal from said NOR circuit, detecting said final address in a page, and generating an output signal;
- and
- a write circuit for writing data into said non-volatile semiconductor memory device in accordance with said output signal of said final address detection circuit.
Dependencies are inferred from the claim text.