Semiconductor memory device
AssigneeNEC Corporation
InventorYasuo Kobayashi
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Abstract
A semiconductor memory device with a power source voltage step-down circuit which generates a stepped-down voltage from electric power supplied from outside and supplies this stepped-down voltage to a memory cell array and peripheral circuits. Current switching device interposed in a circuit or circuits of the semiconductor memory device other than the memory cell array and a switch controlling signal generating means for generating a controlling signal in response to a signal from the outside are provided. The current switching device performs switching of current to flow through the circuit in response to a controlling signal.
Claims8
In a semiconductor memory device which includes a power source input terminal to which electric power is supplied from an external power source, a power source voltage step-down circuit connected to said power source input terminal for generating a stepped-down voltage lower than the voltage of the external power source, a memory cell array to which the stepped-down voltage is supplied, and a peripheral circuit connected to said memory cell array for receiving supply of the stepped-down voltage to perform a logic operation, the improvement which comprises:
- current switching means attached to at least one of a plurality of circuit blocks for switching of current flowing through said at least one circuit block in response to a controlling signal, such that current consumption in said memory cell array during operation may be accurately measured, said plurality of circuit blocks comprising said power source voltage step-down circuit and said peripheral circuit;
- and
- switch controlling signal generating means for generating said controlling signal in response to a signal from the outside.
In a semiconductor memory device which includes a power source input terminal to which electric power is supplied from an external power source, a power source voltage step-down circuit connected to said power source input terminal for generating a stepped-down voltage lower than the voltage of the external power source, a memory cell array to which the stepped-down voltage is supplied, and a peripheral circuit connected to said memory cell array for receiving sup-ply of the stepped-down voltage to perform a logic operation, the improvement which comprises:
- current switching means attached to at least one of a plurality of circuit blocks for performing switching of current flowing through said at least one circuit block in response to a controlling signal, such that current consumption in said memory cell array in operation may be accurately measured, said plurality of circuit blocks comprising said power source voltage step-down circuit and said peripheral circuit;
- and
- switch controlling signal generating means for generating said controlling signal in response to a signal from the outside,
- said current switching means comprising at least one transistor, said semiconductor memory device comprising a plurality of said current switching means, and said switch controlling signal generating means generating first and second controlling signals the phases of which are reverse to each other.
Dependencies are inferred from the claim text.