Method for electrodepositing corrosion barrier on isolated circuitry

A method for forming corrosion resistant isolated circuitry comprising the steps of:

• forming a conductive mandrel having a pattern of circuit elements therein,
• coating the mandrel with a nonconductive material having a pattern defining a circuit to be formed, said circuit including said circuit elements,
• plating a series of layers of electrically conductive material on said mandrel in said pattern, one of said layers adjacent said mandrel being a corrosion resistant material, and
• separating the plated layers from the mandrel to provide a corrosion resistant isolated circuit having features corresponding to said circuit elements and to enable reuse of the mandrel to form additional corrosion resistant isolated circuitry, said step of plating layers comprising initially plating a seed layer of copper upon said mandrel, and including the step of removing at least portions of said seed layer after the plated layers are separated from the mandrel.

A method of forming an isolated circuit having corrosion resistant coated raised features thereon comprising the steps of:

• forming a reusable stainless steel mandrel having a pattern of depressions therein for defining raised features of a circuit to be formed,
• coating said mandrel with a nonconductive material formed in a pattern that selectively exposes surface areas of the mandrel, including said depressions, in a pattern that corresponds to a circuit pattern to be formed thereon, said circuit pattern including raised features corresponding to said mandrel depressions,
• electroplating a seed layer of copper on said exposed mandrel surface,
• electroplating a layer of gold on said seed layer of copper,
• electroplating a layer of nickel on said layer of gold,
• electroplating a layer of copper on said layer of nickel,
• laminating a dielectric substrate to said last mentioned layer of copper,
• separating said mandrel from said deposited layers to provide a multilayer conductive circuit,
• forming a dielectric coverlay with a pattern of holes conforming to said pattern of raised features,
• laminating said dielectric coverlay to said conductive circuit with said raised features received in said holes, and
• removing said seed layer of copper from said raised features after said dielectric coverlay is laminated to said conductive circuit.