Invalidation of entries in a translation table by providing the machine a unique identification thereby disallowing a match and rendering the entries invalid

A method of invalidating entries in a translation table in a computer system, said entries containing translation pairs comprising data to be translated and data representing a result of translation, each entry further holding an identification information for identifying a machine state, aid computer system having a register for storing a current identification information identifying a currently running machine state, and a compare circuit for comparing identification information from one entry of the translation table with the current identification information from aid register, wherein a translation pair from the one entry is used for the translation if said compare circuit detects coincidence, said method comprising the steps of:

• issuing an invalidation command for invalidating all translation table entries which hold the current identification information identifying a currently running machine state whereby all the translation table entries with the current identification information are simultaneously disabled from being used in the translation;
• in response to the invalidation command, selecting a new identification information which has been used to identify neither the currently running machine state nor a past running machine state and assigning the selected new identification information to the currently running machine state;
• and,
• storing the selected new identification information int he register, whereby said currently running machine state is reidentifies by the selected new identification information whereby the compare circuit cannot detect coincidence between the selected new identification stored in the register and the identification information of entries stored in the translation table, thereby rendering the entries invalid.

A system for carrying out an invalidation process of entries in a translation lookaside buffer in a computer system which has a register mean for storing identification information identifying a currently running machine state, said translation lookaside buffer having bits for storing identification information in respective columns of the translation lookaside buffer and means for conversion of a virtual address to a real address, wherein the identification information from the translation lookaside buffer is compared with the identification information from said register means, wherein conversion from a virtual address to real address is responsive to the comparison, said system comprising:

• a table means for holding data comprising a plurality of identification information identifying virtual machines which have been run up to a current time point;
• means for selecting an identification information which does not define a past running virtual machine and assigning the selected identification information to the currently running virtual machine, said selection based on the contents of said holding means wherein the selected identification information reidentifies a currently running virtual machine;
• and,
• means for setting the selected information in said register means, in response to an invalidation command for said translation lookaside buffer being issued during a run of said running virtual machine whereby all translation lookaside buffer entries with identification information equal to the currently running virtual machine prior identification information are simultaneously disabled from being used in the virtual to real address conversion since the compare circuit cannot detect coincidence between the selected identification stored in the register and the identification information of the entries stored in the translation lookaside buffer, thereby rendering the entries invalid.

A computer having a virtual storage system having a register for holding an execution status identity for identifying a currently running virtual machine and an address translation buffer for holding an execution status identity in each entry thereof, wherein an equality detected by a compare circuit between said execution status identity of an entry of the buffer and said execution status identity of said register comprises a one condition representing an existence of an objective virtual address in said address translation buffer when said computer converts said virtual address to a corresponding real address,

• said computer comprising means for storing execution status identities which are contained in entries of the translation buffer, means for obtaining a value which is not registered in the storing means as an execution status identity, and means for setting said obtained value as an execution status identity for reidentifying said currently running virtual machine in said register and means for invalidating all address translation buffer entries with execution status identity the same as the currently running virtual machine's prior execution status identity, in response to an invalidation command being issued during said currently running virtual machine for said address translation buffer whereby all the entries are simultaneously disabled from being used in the virtual to real address conversion since the compare circuit cannot detect equality between the execution status identity stored in the register and the execution status identity of entries stored in the address translation buffer, thereby rendering the entries invalid.

A system for carrying out an invalidation process of a translation table having a plurality of entries each holding translation pairs comprising data to be translated and data representing a result of translation, each entry holding identification information to identify a plurality of translation pairs, said computer system having register means for storing identification information identifying a currently running machine state, means for comparing the identification information from said register means, wherein the success of a conversion of data to be translated into data representing the result of translation is predictable based on the comparison, said system comprising:

• means for obtaining, when invalidating all entries which hold identification information identifying the currently running machine's state, an identification information which does not identify a past running machine state and assigning the obtained identification information to the currently running machine state wherein the obtained identification information reidentifies the currently running machine state;
• and,
• means for storing the obtained identification information in said register means whereby all translation table entries with identification information equal to the current machine state's prior identification information are simultaneously disabled from being used in the translation since the comparing means cannot detect coincidence between the selected identification stored in the register and the identification information of entries stored in the translation table, thereby rendering the entries invalid.

An apparatus comprising:

• a translation lookaside buffer including:
• a virtual address field for storing virtual addresses:
• a real address field for recording real addresses which are associated with said virtual addresses;
• a validation indication field;
• and,
• a virtual machine (VM) identification number field (SID) for storing a VM identification number;
• a first register for storing one of the virtual addresses to be converted and for storing an information indicating an associated virtual computer system;
• a second register for storing a selected one of the VM identification numbers which is associated with a running virtual machine;
• a comparison circuit for detecting an equality between a one of the virtual addresses stored in said virtual address field and said one virtual address stored in said first register and for detecting an equality between the selected VM identification number stored in the second register and said VM identification number stored in said VM identification number field of said translation lookaside buffer;
• an AND-circuit controlled by said comparison circuit for providing a signal indicating that a one of the real addresses stored in the real address field of said translation lookaside buffer is the one of the real addresses into which the one virtual address stored in said first register is to be converted;
• a stack means for storing in table form, data indicative of identification information numbers which have been stored in the second register up to a current time point;
• and,
• a control circuit means for, when an invalidating command for said translation lookaside buffer is issued by the apparatus, selecting an identification information number from identification numbers which do not identify a fast running virtual machine and assigning the selected identification information number to a currently running virtual machine, wherein the selected identification number reidentifies the currently running virtual machine and for storing said selected identification information number into said stack, and for storing the selected identification information number in said second register whereby all translation lookaside buffer entries equal with identification information numbers equal to the currently running virtual machine's prior identification information numbers are simultaneously disabled form being used in the conversion since the comparison circuit cannot detect equality between the identification information number stored in the second register and the identification information numbers of entries stored in the translation lookaside buffer, thereby rendering the entries invalid.