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US 5,317,696 AGranted
Bus arbitration scheme
AssigneeInternational Business Machines Corporation
InventorRolf B. Hilgendorf
Life of this patent
Estimating the term…
Abstract
A bus arbitration scheme for controlling access or mastership of a bus is disclosed. Priority of access to the bus is based not only on the time relationship of the requests for use of the bus arriving at the arbiter but also on the relative priority of each request. Thus a higher priority request will gain access to the bus before a lower priority one even if this latter request arrived at the arbiter first. The arbitration scheme is implemented by a series of logic gates.
Claims12
Apparatus for arbitrating requests from at least three devices for access to a common bus, said apparatus comprising:
- first, second and third grant latch and gate means, each coupled to receive a bus access request from a respective one of said devices, for presenting one of the bus access requests at a time to a bus controller to grant bus access to the device making said one request;
- and
- first, second and third pluralities of block latch and gate means, each of said pluralities having inputs coupled to receive a bus access request from a respective one of said devices and block and no block signals from the other two pluralities of block latch and gate means, having outputs coupled to inputs of the two grant latch and gate means coupled to the other two devices, and issuing block and no block signals to said two grant latch and gate means, said block signal blocking other subsequent, copending bus access requests by the devices coupled to said two grant latch and gate means, said outputs also being coupled to the inputs of said other two pluralities of block latch and gate means to supply said block and no block signals, said block signal input to either one of said other two pluralities of block latch and gate means preventing said one plurality of block latch and gate means from issuing a block signal to the grant latch and gate means coupled to a same device as the block latch and gate means which provides said block signal input.
Dependencies are inferred from the claim text.