Special sensor applied meteorological image process

A data decommutator circuit card assembly for a host system for decommutating an input data stream of a particular data type, comprising:

• an interface circuit having an input and an output, said input receiving the input data stream at an RS 422 compatible level;
• an input multiplexer having first and second multiplexer inputs and an output, said first multiplexer input coupling to the interface output;
• a sync code correlator having an input and a synchronized data output, said input being coupled to the multiplexer output to provide synchronization to the incoming data, the sync code correlator being programmable to search for different sync patterns, sync lengths, and sync locations;
• a data storage buffer having two data banks coupled to receive the synchronized data output;
• a serial to parallel conversion circuit coupled to the data storage buffer for reading the synchronized data in serial form written into the buffer from the sync code correlator and providing a parallel data output, said conversion circuit alternately reading the synchronized data from one of the two data banks while the sync code correlator writes the synchronized data to the other of the two data banks;
• a first microcomputer for reading the decommutated parallel data output from the serial to parallel conversion circuit and providing a decommutated data output to postprocessing;
• at least one post processing microcomputer coupled to the first microcomputer for performing post processing on the decommutated data output and providing a post processed decommutated data output;
• and
• a processor link switch coupled to the first microcomputer and the at least one post processing microcomputer to allow interprocessor communications, the processor link switch including a secondary data input/output port.

A method for operating with a host system a data decommutator architecture to decommutate input data streams of different data formats, the method comprising the steps of:

• downloading software from the host system to the data decommutator architecture for a specific data format;
• configuring field programmable gate arrays in the data decommutator architecture with said software to process the specific data format;
• providing a decommutated data output from the data decommutator architecture;
• cascading a second data decommutator architecture to said data decommutator architecture;
• and
• performing subcommutation of the decommutated data output from the data decommutator architecture in the second data decommutator architecture.