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US 5,317,527 AGranted
Leading one/zero bit detector for floating point operation
AssigneeDigital Equipment Corporation
InventorsSharon M. Britton, Randy Allmon, Sridhar Samudrala
Life of this patent
Estimating the term…
Abstract
A circuit is provided for using the input operands of a floating point addition or subtraction operation to detect the leading one or zero bit position in parallel with the arithmetic operation. This allows the alignment to be performed on the available result in the next cycle of the floating point operation and results in a significant performance advantage. The leading I/O detection is decoupled from the adder that is computing the result in parallel, eliminating the need for special circuitry to compute a carry-dependent adjustment signal. The single-bit fraction overflow that can result from leading I/O misprediction is corrected with existing circuitry during a later stage of computation.
Claims17
A method for performing a floating point operation, comprising the steps of:
- (a) applying a first n-bit floating point operand and a second n-bit floating point operand to an arithmetic unit to perform said floating point operation on said first n-bit floating point operand and said second n-bit floating point operand and to generate a floating point result at an output of the arithmetic unit;
- (b) detecting a leading one position or leading zero position by:
- (i) scanning each bit position of both of said first n-bit floating point operand and said second n-bit floating point operand from left to right to detect a trigger condition:
- A.sub.i+1 XOR B.sub.i+1 =0
- where A is the first n-bit floating point operand, B is the second n-bit floating point operand, A.sub.i or B.sub.i is the value of a bit in position i in A or B, A.sub.i+1 or B.sub.i+1 is the value of a bit one position to the left of A.sub.i or B.sub.i, and XOR is an Exclusive-OR operator;
- (ii) continuing to scan from left to right, and, if said floating point result is a positive value, detecting a next bit position j where:
- [A.sub.j, B.sub.j ]=NOT[0,0]
- where j<i, A.sub.j or B.sub.j is the value of a bit in position j in A or B, and designating said bit position j where [A.sub.j, B.sub.j ]=NOT[0,0] as the leading one position in the floating point result, or, if said floating point result is a negative value, detecting a next bit position j where:
- [A.sub.j, B.sub.j ]=NOT[1,1]
- and designating said bit position j where [A.sub.j, B.sub.j [=NOT[1,1] as the leading zero position in the floating point result;
- (c) and aligning said floating point result to said leading one position if the floating point result is a positive value or to said leading zero position if said floating point result is a negative value.
8 more elements
A floating point processor, comprising:
- (a) an arithmetic unit, and means for applying a first n-bit floating point operand and a second n-bit floating point operand to inputs of said arithmetic unit to perform a floating point operation on said first n-bit floating point operand and said second n-bit floating point operand and generate a floating point result at an output of the arithmetic unit;
- (b) a leading one position or leading zero position detection circuit including:
- (i) means for scanning each bit position of both of said first n-bit floating point operand and said second n-bit floating point operand from left to right to detect a trigger condition:
- A.sub.i+1 XOR B.sub.i+1 =0
- where A is the first n-bit floating point operand, B is the second n-bit floating point operand, A.sub.i or B.sub.i is the value of a bit in position i in A or B, A.sub.i+1 or B.sub.i+1 is the value of a bit one position to the left of A.sub.i or B.sub.i, and XOR is an Exclusive-OR operator;
- (ii) means for continuing to scan from left to right, and, if said floating point result is a positive value, detecting a next bit position j where:
- [A.sub.j, B.sub.j ]=NOT[0,0]
- where j<i, A.sub.j or B.sub.j is the value of a bit in position j in A or B, and designating said bit position j where [A.sub.j, B.sub.j ]=NOT[0,0] as the leading one position in the floating point result, or, if said floating point result is a negative value, detecting a next bit position j where:
- [A.sub.j, B.sub.j ]=NOT[1,1]
- and designating said bit position j where [A.sub.j, B.sub.j ]=NOT[1,1] as the leading zero position in the floating point result;
- (c) and means for aligning said floating point result to said leading one position if the floating point result is a positive value or to said leading zero position if said floating point result is a negative value.
8 more elements
A method for detecting a leading one position or leading zero position for a floating point operation, comprising the steps of:
- (i) scanning each bit position of both a first n-bit floating point operand and a second n-bit floating point operand from left to right to detect a trigger condition:
- A.sub.i+1 XOR B.sub.i+1 =0
- where A is the first n-bit floating point operand, B is the second n-bit floating point operand, A.sub.i or B.sub.i is the value of a bit in position i in A or B, A.sub.i+1 or B.sub.i+1 is the value of a bit one position to the left of A.sub.i or B.sub.i, and XOR is an Exclusive-OR operation;
- (ii) continuing to scan from left to right, and, if a floating point result of said floating-point operation on said first n-bit floating point operand and said second n-bit floating point operand is a positive value, detecting a next bit position j wherein:
- [A.sub.j, B.sub.j ]=NOT[0,0]
- where j<i, A.sub.j or B.sub.j is the value of a bit in position j in A or B, and designating said bit position j where [A.sub.j, B.sub.j ]=NOT[0,0] as the leading one position in the floating point result, or, if said floating point result of said floating point operation on said first n-bit floating point operand and said second n-bit floating point operand is a negative value detecting a next bit position j where:
- [A.sub.j,B.sub.j ]=NOT[1,1]
- and designating said bit position j where [A.sub.j, B.sub.j ]=NOT[1,1] as the leading zero position in the floating point result.
5 more elements
A leading one position or leading zero position detection circuit for a floating point operation comprising:
- (i) means for scanning each bit position of both a first n-bit floating point operand and a second n-bit floating point operand from left to right to detect a trigger condition:
- A.sub.i+1 XOR B.sub.i+1 =0
- where A is the first n-bit floating point operand, B is the second n-bit floating point operand, A.sub.i or B.sub.i is the value of a bit in position i in A or B, A.sub.i+1 or B.sub.i+1 is the value of a bit one position to the left of A.sub.i or B.sub.i, and XOR is an Exclusive-OR operator;
- (ii) mans for continuing to scan from left to right, and, if a floating point result of said floating point operation is a positive value, detecting a next bit position j where:
- [A.sub.j,B.sub.j ]=NOT[0,0]
- where j<i, A.sub.j or B.sub.j is the value of a bit in position j in A or B, and designating said bit position j where [A.sub.j,B.sub.j ]=NOT[0,0] as the leading one position in the floating point result, or, if said floating point result of said floating point operation is a negative value, detecting a next bit position j where:
- [A.sub.j B.sub.j ]=NOT[1,1]
- and designating said bit position j where [A.sub.j B.sub.j ]=NOT[1,1] as the leading zero position in the floating point result.
5 more elements
A method for performing a floating point operation, comprising the steps of:
- (a) applying a first n-bit floating point operand and a second n-bit floating point operand to an arithmetic unit to perform said floating point operation on said first n-bit floating point operand and said second n-bit floating point operand and generate a floating point result at an output of the arithmetic unit;
- (b) detecting a leading one position in parallel with the floating point operation performed by the arithmetic unit;
- (c) detecting a leading zero position in parallel with the floating point operation performed by the arithmetic unit;
- (d) determining whether the floating point result generated by the arithmetic unit is a positive value or a negative value;
- (e) selecting the leading one position if the floating point result is a positive value or the leading zero position if the floating point result is negative value;
- and
- (f) aligning said floating point result to said leading one position if the floating point result is a positive value or to said leading zero position if said floating point result is a negative value.
4 more elements
A floating point processor, comprising:
- (a) an arithmetic unit for performing a floating point operation on operands to generate a floating point result at an output of said arithmetic unit;
- (b) means for applying a first n-bit floating point operand and a second n-bit floating point operand to the arithmetic unit;
- (c) means for detecting a leading one position in parallel with the floating point operation performed by the arithmetic unit;
- (d) means for detecting a leading zero position in parallel with the floating point operation performed by the arithmetic unit;
- (e) means for determining whether the floating point result is a positive value or a negative value;
- (f) means for selecting the leading one position if the floating point result is a positive value or the leading zero position if the floating point result is negative value;
- and
- (g) means for aligning said floating point result to said leading one position if the floating point result is a positive value or to said leading zero position if said floating point result is a negative value.
5 more elements
Dependencies are inferred from the claim text.