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US 5,317,459 AGranted
Floppy disk apparatus having power-save system during standby mode
AssigneeNEC Corporation
InventorJun'ichi Ukai
Life of this patent
Estimating the term…
Abstract
In a power-save system for a floppy disk apparatus, a latch circuit which is gate-controlled by a trailing-edge delayed standby signal is introduced, whereby it becomes possible to power off sensor circuits contained in the apparatus.
Claims11
A floppy disk apparatus comprising:
- a logic circuit for detecting a standby mode of the apparatus and generating a standby signal;
- a sensor circuit;
- a power source control circuit connected to the sensor circuit and receiving the standby signal as an input signal from the logic circuit and controlling a power source of the sensor circuit in response to the input standby signal;
- a delay circuit receiving the standby signal as an input signal from the logic circuit, delaying a trailing-edge timing of said standby signal and generating a trailing-edge delayed standby signal;
- and
- a latch circuit having an input terminal receiving a sensor output signal as an input signal from the sensor circuit, a gate terminal receiving the trailing-edge delayed standby signal as a gate signal from the delay circuit, and an output terminal, the latch circuit acting to output the sensor output signal processed through the latch circuit during a period when the gate signal is in an inactive state and to output the sensor output signal in a state just before transition of the gate signal from the inactive state to an active state during a period when the gate signal is in the active state.
3 more elements
A power-save system for a floppy disk apparatus to enable power-off of sensor circuits of the apparatus, the improvement comprising:
- a logic circuit for detecting a standby mode of the apparatus and generating a standby signal;
- a sensor circuit;
- a power source control circuit connected to the sensor circuit and receiving the standby signal as an input signal from the logic circuit and controlling a power source of the sensor circuit in response to the input standby signal;
- a delay circuit receiving the standby signal as an input signal from the logic circuit, delaying a trailing-edge timing of said standby signal and generating a trailing-edge delayed standby signal;
- and
- a latch circuit having an input terminal receiving a sensor output signal as an input signal from the sensor circuit, a gate terminal receiving the trailing-edge delayed standby signal as a gate signal from the delay circuit, and an output terminal, the latch circuit acting to output the sensor output signal processed through the latch circuit during a period when the gate signal is in an inactive state and to output the sensor output signal in a state just before transition of the gate signal from the inactive sate to an active state during a period when the gate signal is in the active state.
3 more elements
A floppy disk apparatus comprising:
- a logic circuit for detecting a standby mode of the apparatus and generating a standby signal;
- a power source control circuit;
- a first sensor means for detecting a zero track state of the floppy disk apparatus;
- a second sensor means for detecting whether or not a floppy disk is inserted into the floppy disk apparatus;
- said power source control circuit being connected to each sensor and receiving the standby signal as an input signal from the logic circuit and controlling a power source of each sensor in response to the input standby signal;
- a delay circuit receiving the standby signal as an input signal from the logic circuit, delaying a trailing-edge timing of said standby signal and generating a trailing-edge delayed standby signal;
- and
- latch means including a first and second latch circuit each having an input terminal receiving an output signal from a respective sensor means as an input signal, a gate terminal receiving the trailing-edge delayed standby signal as a gate signal from the delay circuit and an output terminal, each latch circuit acting to output the output signal of the respective sensor means, processed through said latch circuit during a period when the gate signal is in an inactive state and to output the output signal of the respective sensor means in a state just before transition of the gate signal from the inactive state to an active state during a period when the gate signal is in the active state.
5 more elements
Dependencies are inferred from the claim text.