US 5,317,284 A · Wide band, low noise, fine step tuning, phase locked loop frequency synthesizer

Abstract

A wide bandwidth, low noise, fine frequency step phase locked loop frequency synthesizer (10) and processing method. The synthesizer (10) includes a first divider (16) for dividing a first signal provided by a reference frequency source (12). A first phase locked loop (20) is provided for receiving a divided first signal from the first divider (16) and providing an intermediate frequency signal in response thereto. The first phase locked loop (20) includes a first phase detector (22) for comparing the phase of the first signal to the phase of a first feedback signal and providing a first phase difference signal in response thereto. The first phase locked loop (20) includes a first voltage controlled oscillator (30) for providing the intermediate signal in response to the first phase difference signal. The first phase locked loop (20) includes a first mixer (32) for mixing the intermediate signal with a second signal at a second frequency F2 and providing the first feedback signal in response thereto. A second divider (38) is included in the first phase locked loop (20) for dividing the first feedback signal prior to its application to the first phase detector (22). A third divider (39) is provided for shifting the frequency of the intermediate frequency signal, and a second phase locked loop (40) is coupled to the third divider for processing the frequency shifted intermediate frequency signal and providing an output frequency signal from the synthesizer. The second phase locked loop (40) includes a second phase detector (42) for comparing the phase of the shifted intermediate signal to the phase of a second feedback signal and providing a second phase difference signal in response thereto. A second voltage controlled oscillator (50) is included for providing the output frequency signal from the synthesizer (10).

Claims20

Dependent claims

Apparatus comprising:

reference frequency means for providing a plurality of reference frequency signals having predetermined reference frequencies F1, F2, F3;
first frequency shifting means coupled to the reference frequency means for shifting the frequency of the first frequency signal at frequency F1 to provide a frequency shifted reference frequency signal at frequency F1';
first phase locked loop means coupled to the reference frequency means for receiving the frequency shifted reference frequency signal at frequency F1' and the second reference frequency signal at frequency F2, and for providing an intermediate output signal at frequency FI in response thereto;
second frequency shifting means coupled to the first phase locked loop means for shifting the frequency of the intermediate frequency signal at frequency FI to provide a frequency shifted intermediate frequency signal at frequency FI';
and
second phase locked loop means coupled to the reference frequency means and to the second frequency shifting means for receiving the third reference frequency signal at frequency F3 and the frequency shifted intermediate signal at frequency FI' and for providing an output signal of the frequency synthesizer at frequency FO in response thereto.

3 more elements

A frequency synthesizer comprising:

a reference frequency source for providing a plurality of reference frequency signals;
first divider means coupled to the reference frequency source for dividing a first reference frequency signal at a first frequency provided thereby;
first phase locked loop means coupled to the first divider means for receiving the divided first reference frequency signal and for providing an intermediate frequency signal in response thereto, and wherein the first phase locked loop means comprises:
first phase detector means coupled to the first divider means for comparing the phase of the first reference frequency signal to the phase of a first feedback signal and for providing a first phase difference signal in response thereto;
first voltage controlled oscillator means coupled to the first phase detector means for providing the intermediate signal in response to the first phase difference signal;
first mixing means coupled to the first voltage controlled oscillator means and the reference frequency source for mixing the intermediate signal with a second signal at a second frequency provided by the reference frequency source and for providing the first feedback signal in response thereto;
and
second divider means coupled between the first mixing means and the first phase detector means for frequency shifting the first feedback signal to provide a frequency shifted first feedback signal;
third divider means coupled to the first voltage controlled oscillator means for shifting the frequency of the intermediate signal to provide a frequency shifted intermediate signal;
and
second phase locked loop means for receiving the frequency shifted intermediate signal and for providing an output signal of the frequency synthesizer in response thereto, and wherein the second phase locked loop means comprises:
second phase detector means coupled to the third divider means for comparing the phase of the frequency shifted intermediate signal to the phase of a second feedback signal and for providing a second phase difference signal in response thereto;
second voltage controlled oscillator means coupled to the second phase detector means for providing the output signal of the frequency synthesizer in response to the second phase difference signal;
and
second mixing means coupled to the reference frequency source, the second voltage controlled oscillator means, and the second phase detector means, for mixing the output signal with a third signal at a third frequency provided by the reference frequency source, and for providing the second feedback signal in response thereto.

12 more elements

A method of synthesizing frequencies comprising the steps of:

providing a plurality of reference frequency signals;
frequency dividing a first reference frequency signal by a first predetermined number;
processing the frequency divided first reference frequency signal and a second reference frequency signal to generate an intermediate frequency signal at frequency;
frequency dividing the intermediate frequency signal by a second predetermined number;
and
processing the frequency divided intermediate frequency signal and a third reference frequency signal to generate an output frequency signal.

3 more elements

Dependencies are inferred from the claim text.

Wide band, low noise, fine step tuning, phase locked loop frequency synthesizer

Life of this patent

Wide band, low noise, fine step tuning, phase locked loop frequency synthesizer

Life of this patent

Abstract

Claims20