Linear voltage to current converter including feedback network

A voltage to current converter comprising:

• first, second, and third field effect transistors (FETs), the sources of which are electrically connected to define a common source node;
• first and second voltage inputs electrically connected to the gate of said first FET and the gate of said second FET, respectively;
• first and second current outputs electrically connected to the drain of said first FET and the drain of said second FET, respectively;
• and
• a feedback network, electrically connected between the drain of said third FET and the common source node for varying the voltage between the common source node and ground in response to changes in said first and second voltage inputs in order to maintain constant current through said third FET.

A voltage to current converter comprising:

• first, second, and third field effect transistors (FETs) the sources of which are electrically connected to define a common source node;
• first and second voltage inputs electrically connected to the gate of said first FET and the gate of said second FET, respectively;
• first and second current outputs electrically connected to the drain of said first FET and the drain of said second FET, respectively;
• a fourth FET, the gate of which is electrically connected the drain of said third FET;
• a first bipolar transistor, the collector of which is electrically connected to both the source of said fourth FET and the base of said first bipolar transistor;
• a second bipolar transistor, the collector of which is electrically connected to said common source node, the base of which is electrically connected to the base of said first bipolar transistor, and the emitter of which is electrically connected to the emitter of said first bipolar transistor;
• a fifth FET, the drain of which is electrically connected to the drain of said third FET;
• a sixth FET, the drain of which is electrically connected to both the gate of said fifth FET and the gate of said sixth FET;
• a current source which is electrically connected to the drain of said sixth FET;
• a first reference voltage which is electrically connected to the drain of said fourth FET, the source of said fifth FET, and the source of said sixth FET;
• and
• a second reference voltage electrically connected to said current source, the emitter of said first bipolar transistor, and the emitter of said second bipolar transistor.

A voltage to current converter comprising:

• first and second field effect transistors (FETs), the sources of which are electrically connected to define a first common source node;
• third and fourth FETs, the sources of which are electrically connected to define a second common source node;
• a first voltage input electrically connected to the gate of said first FET and the gate of said third FET;
• a second voltage input electrically connected to the gate of said second FET and the gate of said fourth FET;
• first and second current outputs electrically connected to the drain of said third FET and the drain of said second FET, respectively;
• a first feedback network electrically connected between the drain of said first FET and said first common source node for maintaining constant current through said first FET;
• and
• a second feedback network electrically connected between the drain of said fourth FET and said second common source node for maintaining constant current through said fourth FET.

A voltage to current converter comprising:

• first and second field effect transistors (FETs), the sources of which are electrically connected to define a first common source node;
• third and fourth FETs, the sources of which are electrically connected to define a second common source node;
• a first voltage input electrically connected to the gate of said first FET and the gate of said third FET;
• a second voltage input electrically connected to the gate of said second FET and the gate of said fourth FET;
• first and second current outputs electrically connected to the drain of said third FET and the drain of said second FET, respectively;
• a fifth FET arranged as a common drain follower, the gate of which is electrically connected to the drain of said first FET;
• a first reference voltage which is electrically connected to the drain of said fifth FET;
• a sixth FET arranged as a common drain follower, the gate of which is electrically connected to the drain of said fourth FET, and the drain of which is electrically connected to said first reference voltage;
• a seventh FET the source of which is electrically connected to said first reference voltage, and the drain of which is electrically connected to the drain of said first FET;
• a current source which is electrically connected to the gate of said seventh FET;
• a second reference voltage which is electrically connected to said current source;
• an eighth FET the source of which is electrically connected to said first reference voltage, the drain of which is electrically connected to said current source, and the gate of which is electrically connected to said current source;
• a ninth FET the source of which is electrically connected to said first reference voltage, the drain of which is electrically connected to the drain of said fourth FET, and the gate of which is electrically connected to said current source;
• a first bipolar transistor, the collector of which is electrically connected to both the source of said fifth FET and the base of said first bipolar transistor, and the emitter of which is electrically connected said second reference voltage;
• a second bipolar transistor, the collector of which is electrically connected to said first common source node, the base of which is electrically connected to the base of said first bipolar transistor, and the emitter of which is electrically connected to said second reference voltage;
• a third bipolar transistor, the collector of which is electrically connected to both the source of said sixth FET and the base of said third bipolar transistor, and the emitter of which is electrically connected said second reference voltage;
• and
• a fourth bipolar transistor, the collector of which is electrically connected to said second common source node, the base of which is electrically connected to the base of said third bipolar transistor, and the emitter of which is electrically connected to said second reference voltage.