Active filter circuit

An active filter circuit, comprising:

• a first differential pair constructed to include first and second transistors;
• a first capacitive load connected to a collector of said second transistor of said first differential pair;
• a second differential pair constructed to include third and fourth transistors;
• a fifth transistor for supplying an output at said collector of said second transistor of said first differential pair to a base of said fourth transistor of said second differential pair;
• a second capacitive load connected to said collector of said fourth transistor;
• a negative feed-back transistor for feeding-back an output at said collector of said fourth transistor to a base of said first transistor constituting said first differential pair;
• sixth and seventh transistors for forming a first current mirror circuit which is connected to said collector of said second transistor;
• eighth and ninth transistors for forming a current mirror circuit which is connected to said collector of said fourth transistor;
• and
• biasing means formed in association with at least one of said first and second differential pairs for applying bias voltages to bases of two transistors constituting said at least one of the differential pairs, said biasing means including resistor voltage-dividing means for applying a divided voltage to respective bases of said two transistors as said bias voltages.

A filter controlling circuit, comprising:

• a filter for receiving an input and for outputting an output with a phase characteristic, said phase characteristic of said filter changing in accordance with a control voltage;
• means, coupled to said filter, for outputting a direct current voltage component having a level based on said phase characteristic of said output of said filter;
• level comparing means for comparing said level of said direct current voltage component with a reference voltage;
• and
• means for applying said control voltage to said filter based upon an output of said level comparing means.

A filter controlling circuit comprising:

• a filter, a center frequency of said filter being able to be changed in accordance with a control voltage;
• amplifying means having a gain of 1 or more for feeding-back an output of said filter to an input of said filter;
• phase comparing means receiving the output of said filter and a further input signal;
• and
• means for applying said control voltage to said filter based upon an output of said phase comparing means, wherein said filter includes,
• a first differential pair constructed to include first and second transistors;
• a first capacitive load connected to a collector of said second transistor of said first differential pair;
• a first negative feed-back path for feeding-back an output at said collector of said second transistor to a base of said second transistor;
• a second differential pair constructed to include third and fourth transistors;
• a second capacitive load connected to a collector of said fourth transistor of said second differential pair;
• a second negative feed-back path for feeding-back an output at said collector of said fourth transistor to a base of said first transistor constituting said first differential pair;
• current changing means for correlatively changing current amounts of said first and second differential pairs in response to said control voltage;
• and
• biasing means formed in association with at least one of said first and second differential pairs for applying bias voltages to bases of two transistors constituting said at least one of the differential pairs, said biasing means including resistor voltage-dividing means or applying a divided voltage to respective bases of said two transistors as said bias voltages.

A filter controlling circuit comprising:

• a filter, a center frequency of said filter being able to be changed in accordance with a control voltage;
• amplifying means having a gain of 1 or more for feeding-back an output of said filter to an input of said filter;
• phase comparing means receiving the output of said filter and a further input signal;
• and
• means for applying said control voltage to said filter based upon an output of said phase comparing means, wherein said filter includes,
• a first differential pair constructed to include first and second transistors;
• a first capacitive load connected to a collector of said second transistors of said first differential pair;
• a second differential pair constructed to include third and fourth transistors;
• a connecting path for connecting said collector of said second transistor of said first differential pair to a base of said fourth transistor of said second differential pair;
• a second capacitive load connected to said collector of said fourth transistor;
• a negative feed-back path for feeding-back said collector of said fourth transistor to a base of said first transistor constituting said first differential pair;
• current changing means for correlatively changing current amounts of said first and second differential pairs in response to said control voltage;
• and
• biasing means formed in association with at least one of said first and second differential pairs for applying bias voltages to bases of two transistors constituting said at least one of the differential pairs, said biasing means including resistor voltage-dividing means for applying a divided voltage to respective bases of said two transistors as said bias voltages.

An active filter circuit, comprising:

• a first differential pair constructed to include first and second transistors;
• a first capacitive load connected to a collector of said second transistor of said first differential pair;
• a first negative feed-back transistor for feeding-back an output at said collector of said second transistor to a base of said second transistor;
• a second differential pair constructed to include third and fourth transistors;
• a second capacitive load connected to a collector of said fourth transistor of said second differential pair;
• a second negative feed-back transistor for feeding-back an output at said collector of said fourth transistor to a base of said first transistor constituting said first differential pair;
• fifth and sixth transistors for forming a first current mirror circuit which is connected to said collector of said second transistor;
• and
• seventh and eighth transistors for forming a second current mirror circuit which is connected to said collector of said fourth transistor.

An active filter circuit, comprising:

• a first differential pair constructed to include first and second transistors;
• a first capacitive load connected to a collector of said second transistor of said first differential pair;
• a second differential pair constructed to include third and fourth transistors;
• a fifth transistor for supplying an output at said collector of said second transistor of said first differential pair to a base of said fourth transistor of said second differential pair;
• a second capacitive load connected to a collector of said fourth transistor;
• a negative feed-back transistor for feeding-back an output at said collector of said fourth transistor to a base of said first transistor constituting said first differential pair;
• sixth and seventh transistors for forming a current mirror circuit which is connected to said collector of said second transistor;
• and
• eighth and ninth transistors for forming a current mirror circuit which is connected to said collector of said fourth transistor.