Method and apparatus for frequency discriminating computer network signals
Assignee3Com Corporation
InventorDavid A. Kranzler
Life of this patent
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Abstract
A digital frequency discrimination circuit includes an edge detector coupled to receive a transmission signal for producing an edge detected signal; an edge timer including a shift register clocked by the clock signal and having the edge detected signal as a data input, and a timeout determining subcircuit having a plurality of bits of the shift register coupled as edge detection inputs, for determining and providing a timeout signal indicating whether any of the edge detection inputs represents an edge detection; and a state machine circuit coupled to receive the clock signal, the edge detected signal, and the timeout signal for producing an unsquelch signal indicating whether the transmission signal meets frequency discrimination requirements.
Claims8
In a receiver for a Local Area Network (LAN) environment, a frequency discrimination circuit accepting as input a clock signal and a transmission signal, the frequency discrimination circuit comprising:
- a) an edge detector coupled to receive the clock signal and the transmission signal as inputs for producing an edge detected signal;
- b) an edge timer coupled to receive the clock signal and the edge detected signal as inputs for producing a timeout signal;
- and
- c) a state machine circuit coupled to receive the clock signal, the edge detected signal, and the timeout signal for producing an unsquelch signal indicating whether the transmission signal meets frequency discrimination requirements;
- wherein the edge detected signal is synchronous with the clock signal;
- wherein the edge timer comprises a shift register clocked by the clock signal and having the edge detected signal as a data input;
- and
- wherein the edge timer further comprises a timeout determining means having edge detection inputs, with a plurality of bits of the shift register coupled as edge detection inputs, for determining and providing a timeout signal indicating that none of the edge detection inputs represents an edge detection.
In a receiver for receiving a network transmission signal of a local area network, a frequency discrimination circuit comprising:
- a) an edge detector coupled to receive the network transmission signal as an input, for producing an edge detected signal;
- b) an edge timer comprising
- i) a shift register clocked by a clock signal and having the edge detected signal as a data input, and
- ii) a timeout determining means having edge detection inputs, with a plurality of bits of the shift register coupled as edge detection inputs, for determining and providing a timeout signal indicating that none of the edge detection inputs represents an edge detection;
- and
- c) a state machine circuit coupled to receive the clock signal, the edge detected signal, and the timeout signal for producing an unsquelch signal indicating whether the transmission signal meets frequency discrimination requirements.
Dependencies are inferred from the claim text.