Microprocessor-based monitoring or protection device comprising an analog data acquisition system
AssigneeMerlin Gerin
InventorsGilbert Chaboud, Yvan Kalenine
Life of this patent
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Abstract
A certain number of high bits of each sample (12 bits) supplied by an analog-to-digital converter is used as the address of a comparison zone of a RAM associated with the microprocessor of the device. In this comparison zone the result of comparison of this sample with a predetermined number of thresholds has previously been recorded. The sample (12 bits) and associated comparison result (4 bits) are stored in a storage zone of the RAM for subsequent processing by the microprocessor. This simultaneous acquisition of a sample and of the prerecorded result of comparison of this sample with the thresholds minimizes the time devoted by the microprocessor to data acquisition.
Claims12
A monitoring or protection device comprising:
- a microprocessor, a RAM, an analog-to-digital converter for receiving analog input signals and supplying digital samples representative of the analog input signals to the microprocessor, and comparison means for comparing each digital sample with a predetermined number of predetermined thresholds,
- wherein said comparison means includes a first, comparison, zone of the RAM, wherein the RAM is connected to an output of the analog-to-digital converter by an address bus in such a way, that a predetermined number of high bits of a sample constitutes the address of a predetermined number of memory locations of the comparison zone, in which the results of comparison to said thresholds of the samples whose high bits have a predetermined value are previously stored, in binary form, and wherein said comparison results and the corresponding sample are stored in a second, storage, zone of the RAM.
An apparatus comprising;
- an analog-to-digital converter for converting analog input signals into digital samples representative of the analog input signals, wherein the digital samples includes a plurality of high bits and low bits;
- a random access memory unit including a comparison zone and a storage zone, wherein the comparison zone contains a plurality of storage locations containing comparison result data corresponding to a comparison of the digital samples with a plurality of predetermined thresholds;
- first bus means for applying the high bits of the digital samples to the random access memory unit to address the storage locations in the comparison zone, wherein the comparison data is then supplied to a data output of the random access memory unit;
- a first buffer memory coupled to an output of the analog-to-digital converter, wherein the first buffer memory includes a first storage part that receives the high bits of the digital samples and a second storage part that receives the low bits of the digital samples;
- a second buffer memory coupled to the data output of the random access memory unit to receive the comparison results data;
- second bus means for addressing the storage zone of the random access memory and transferring the high bits of the digital samples from the first part of the first buffer memory to the storage zone during a first read cycle, and for transferring the low bits of the digital samples from the second part of the first buffer memory and the comparison result data from the second buffer memory to the storage zone during a second read cycle;
- a microprocessor coupled to an output of the first buffer memory and the second buffer memory, wherein the microprocessor reads the high bits of the digital samples from the first part of the first buffer memory during the first read cycle, and the low bits of the digital samples from the second part of the first buffer memory and the comparison result data from the second buffer memory during the second read cycle;
- and
- a monitoring circuit for synchronizing the operation of the analog-to-digital converter, the random access memory unit, the first and second bus means, the first and second buffer memories and the microprocessor.
Dependencies are inferred from the claim text.