Semiconductor memory device having self-refresh and back-bias circuitry
AssigneeSamsung Electronics Co., Ltd.
InventorsMoon-Gone Kim, Sei-Seung Yoon
Life of this patent
Estimating the term…
Loading patent…
AssigneeSamsung Electronics Co., Ltd.
InventorsMoon-Gone Kim, Sei-Seung Yoon
Estimating the term…
A semiconductor memory device includes a refresh timer for generating a refresh clock pulse, a binary counter for generating a predetermined number of signals of different frequencies and a circuit for generating a self-refresh enable signal in response to the signal transmitted from the binary counter. A back-bias clock pulse generator is also included having first, second and third selectors, of which the third selector selects one of the signals transmitted from the binary counter in response to a signal output from each of the first and second selectors. A back-bias generator having an oscillator and a back-bias voltage detecting circuit and a selection circuit for receiving the output signal from the back-bias voltage detection circuit is attached thereto. A signal is transmitted to the oscillator in response to the self-refresh enable signal. The oscillator output, together with the output of the back-bias control pulse generator, cause a driver control circuit to feed a drive signal to a charge pump during a self-refresh operation.
A programmable back-bias control clock generating circuit for use with a semiconductor memory device having a back-bias voltage generator, said programmable back-bias clock generating circuit comprising;
A back-bias generator in a semiconductor memory device having memory self-refresh operation, comprising:
A semiconductor memory device comprising:
Dependencies are inferred from the claim text.