System for performing writes to non-volatile memory elements in a minimal time

A one-chip microcomputer including a microprocessor for executing a predetermined data processing in accordance with a program, a timer circuit, and an electrically programmable read only memory, the one-chip microcomputer comprising:

• a bus;
• a microprocessor being coupled to the bus;
• a read only memory, coupled to the bus, for storing the program therein, the program including a data processing program and a data write program for writing data to the electrically programmable read only memory;
• the electrically programmable read only memory being coupled to the bus and having a read mode and a write mode, wherein in the read mode the electrically programmable read only memory receives an address signal provided from the microprocessor executing the data processing program via the bus and provides data to the bus, and wherein in the write mode the electrically programmable read only memory receives an address signal and data which are provided from the microprocessor executing the data write program via the bus to write the data into the electrically programmable read only memory;
• and
• timer means including:
• an oscillation circuit for producing pulse signals having a predetermined frequency;
• a time register coupled to the bus for storing a time information provided from the microprocessor executing the data write program;
• a counter coupled to receive the pulse signals and to the time register and responsive to reception of a control signal provided from the microprocessor executing the data write program for starting count operations of the pulse signals, the counter performing the count operations until count times indicated by the time information;
• a logic circuit coupled to the counter and to the electrically programmable read only memory for providing a write signal having a first level to the electrically programmable read only memory when the counter performs the count operations, and having a second level to the electrically programmable read only memory when the counter does not perform the count operations, where the write signal of the first level enables the write mode of the electrically programmable read only memory, and the write signal of the second level enables the read mode of the electrically programmable read only memory.

A one-chip microcomputer including a microprocessor for executing a predetermined data processing in accordance with a program, an oscillator, and an electrically programmable read only memory, the one-chip microcomputer comprising:

• a bus;
• the microprocessor being coupled to the bus;
• a read only memory, coupled to the bus, for storing the program therein, the program including a data processing program and a data write program for writing data to the electrically programmable read only memory;
• the electrically programmable read only memory being coupled to the bus and having a read mode and a write mode, wherein in the read mode the electrically programmable read only memory receive an address signal provided from the microprocessor executing the data processing program via the bus and provides data to the bus, and wherein in the write mode the electrically programmable read only memory receives an address signal and data which are provided from the microprocessor executing the data write program via the bus to write the data into the electrically programmable read only memory;
• and
• a timer circuit including:
• an oscillation circuit for producing pulse signals having a predetermined frequency;
• a time register coupled to the bus for storing a time information provided from the microcomputer executing the data write program;
• a counter coupled to received the pulse signals and to the time register and responsive to reception of a control signal provided from the microprocessor executing the data write program for starting count operations of the pulse signals, the counter performing the count operations until count times indicated by the time information;
• a logic circuit coupled to the counter and to the electrically programmable read only memory for providing a write signal having a first level to the electrically programmable read only memory when the counter performs the count operations, and having a second level to the electrically programmable read only memory when the counter does not perform the count operations, where the write signal of the first level enables the write mode of the electrically programmable read only memory, and the write signal of the second level enables the read mode of the electrically programmable read only memory.