Fault recoverable computer system

In a computer system having fault recoverable capability, and including a first and second data processing unit (DPU), wherein each of said first and second DPU is executing the same task essentially in parallel, each DPU comprising:

• a) processing means;
• b) memory means, operatively connected to said processing means, for storing information;
• c) protected memory means, operatively connected to said memory means and to said processing means, for storing system data, wherein said system data stored in said protected memory means is immune from transient conditions;
• and
• d) monitor means, operatively connected to said processing means, said memory means, and said protected memory means of the associated DPU, and further wherein the monitor means of the first DPU is operatively connected to said second DPU and wherein the monitor means of the second DPU is operatively connected to the first DPU, for detecting the occurrence of an upset within the computer system to reinitialize the corresponding DPU, the DPU being reinitialized by said system data from the protected memory means of the corresponding DPU to a condition just prior to the occurrence of the upset thus avoiding utilization of any potentially erroneous data, and thereby permitting the DPU to return to its normal processing with valid data.