B-ISDN sequencer chip device
AssigneeBell Communications Research, Inc.
InventorHung-Hsiang J. Chao
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AssigneeBell Communications Research, Inc.
InventorHung-Hsiang J. Chao
Estimating the term…
A sequencer chip device, provided for use in a broadband integrated service digital network (B-ISDN), is particularly adapted to control users' traffic at two places in the network: at the user-network interface (UNI) by a traffic enforcer, and at the network-node surface interface (NNI) by a queue manager. The traffic enforcer contains a buffer to delay and reshape violating cells that do not comply with some agreed-upon traffic parameters. The queue manager manages cells in a queue at network nodes in such a way that higher priority cells are always served first, low priority cells are discarded when the queue is full, and any interference between same-priority cells is prevented. Proposed architectures for the traffic enforcer and the queue manager include the chip device. The chip device includes a plurality of modules each of which is divided into three main functional areas: controller, memory and comparator. The chip device is preferably implemented using 1.2 .mu.m CMOS technology.
A sequencer chip device for use in a broadband integrated service digital network wherein users' traffic in the form of asynchronous transfer mode (ATM) cells is scheduled, the sequencer chip device comprising:
Dependencies are inferred from the claim text.