Apparatus for testing ATM channels

An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel formed by self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways respectively to a plurality of output highways, comprising:

• test cell inserting means, provided respectively in said input highways, for sequentially generating a plurality of test cells carrying virtual identifiers indicating test cells in their headers and test data in their payloads;
• test cell tag attaching means, provided respectively in said input highways, for attaching, to test cells multiplexed respectively over to said input highways by said test cell inserting means, tags enabling switching operations to be performed at desired crossing points in said self-routing modules;
• and
• test cell checking means, provided respectively in said output highways, for extracting test cells by identifying virtual identifiers attached to the headers of cells outputted to said output highways from said self-routing modules, and for examining test data attached to the payloads to said test cells thus extracted.

An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel formed by self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways respectively to a plurality of output highways, comprising:

• test cell inserting means, provided respectively in said input highways, for sequentially generating a plurality of test cells carrying virtual identifiers indicating test cells in their headers and test data in their payloads, wherein
• said test cell inserting means attaches, to respective octets of the payloads of said test cells, consecutive values sequentially incremented or decremented from the values in the header octets of said payloads;
• test cell tag attaching means, provided respectively in said input highways, for attaching, to test cells multiplexed respectively over to said input highways by said test cell inserting means, tags enabling switching operations to be performed at desired crossing points in said self-routing modules;
• and
• test cell checking means, provided respectively in said output highways, for extracting test cells by identifying virtual identifiers attached to the headers of cells outputted to said output highways from said self-routing modules, and for examining test data attached to the payloads to said test cells thus extracted, wherein
• said test cell checking means examines the payload abnormality of said test cells by judging whether said test data values attached to respective octets in the payloads of said test cells extracted are said consecutive values sequentially incremented or decremented.

An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel formed by self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways respectively to a plurality of output highways, comprising:

• test cell inserting means, provided respectively in said input highways, for sequentially generating a plurality of test cells carrying virtual identifiers indicating test cells in their headers and test data in their payloads, wherein
• said test cell inserting means, generates successively in a predetermined number and attaches to respective octets of payloads of respective test cells, consecutive values sequentially incremented or decremented from the values in the header octets of the payload of a first test cell of said predetermined number of test cells, wherein
• test cell tag attaching means, provided respectively in said input highways, for attaching, to test cells multiplexed respectively over to said input highways by said test cell inserting means, tags enabling switching operations to be performed at desired crossing points in said self-routing modules, wherein
• said test cell tag attaching means attaches the same tag to each of said predetermined number of test cells multiplexed successively over to said input highways by said test cell inserting means;
• and
• test cell checking means, provided respectively in said output highways, for extracting test cells by identifying virtual identifiers attached to the headers of cells outputted to said output highways from said self-routing modules, and for examining test data attached to the payloads to said test cells thus extracted, wherein
• said test cell checking means examines the payload abnormality and loss of each of said test cells by judging whether said test data values attached to respective octets of the payloads in each of said test cells successively extracted are consecutive values sequentially incrementing or decrementing starting from the test data values in the header octet.