Color palette device having big/little endian interfacing, systems and methods

A color palette comprising:

• a plurality of ordered input terminals for receiving in parallel m bits of data, wherein m is a positive integer, said m bits of data having a bit ordering;
• a pseudo-color path comprising:
• a pseudo-color selector having a plurality of ordered inputs coupled to said input terminals for receiving at least some of said m bits and outputting at least one recall address in response, bits forming said recall address having a bit ordering;
• an interpreter provided at outputs of said selector for selectively reversing said bit ordering of said bits forming a said recall address;
• and
• a memory coupled to said selector and having a plurality of data storage locations, each said location having an associated said recall address, said memory operable to output color data words written into a said location in response to a said associated recall address from said selector;
• and a true color path comprising:
• a first interpreter coupled to said input terminals for selectively reversing said bit ordering of said m bits having;
• a true color selector coupled to said first interpreter and receiving said m bits, said true color selector selectively passing unchanged said m bits received from said first interpreter in a first mode, selectively outputting a p bit word from said m bits in a second mode, and sequentially outputting at least two words of p bits each from said m bits in a third mode, wherein p is a positive integer;
• a second interpreter coupled to said true color selector for selectively reversing a bit ordering of a said p-bit word received from said true color selector in said second and third modes, said second interpreter passing unchanged said m bits of data in received from said true color selector in said first mode;
• and
• true color output multiplexing circuitry coupled to said second interpreter circuitry and operable select to output a plurality of multiple bit words of true color data from bits received from said second interpreter.

A graphics processor system comprising:

• a graphics processor controlling said system and operating in a data format selected from the Big Endian and Little Endian formats;
• a video memory coupled to said processor for storing a plurality of color codes defining a video image to be displayed as a plurality of pixels, each said color code comprising a plurality of data words formatted in accordance with said selected format such that said data words comprising a said color code have a corresponding word ordering and bits comprising a said color code have a corresponding bit ordering;
• a color palette operating in an other one of the Big Endian and Little Endian formats comprising:
• a plurality of ordered input terminals reversibly coupled to said video memory;
• a pseudo-color path comprising:
• a pseudo-color selector coupled to said input terminals for receiving said color codes and outputting at least one recall address in response, bits forming n said recall address having a bit ordering;
• an interpreter provided at outputs of said selector for selectively reversing said bit ordering of said bits forming a said recall address;
• and
• a memory coupled to said interpreter and having a plurality of data storage locations, each said location having an associated said recall address, said memory operable to output a color data word written into a said location in response to a said associated recall address;
• and
• a true color path comprising:
• a first interpreter coupled to said input terminals for selectively reversing said bit ordering of said bits comprising said color codes;
• a true color selector coupled to said first interpreter and receiving said color codes, said true color selector selectively passing all said bits comprising a said color code in a first mode, selectively passing at least some of said bits comprising a said color code as a single word in a second mode, and sequentially passing at least two words each comprising at least some of said bits comprising a said color code in a third mode;
• a second interpreter coupled to said true color selector for selectively reversing a bit ordering of said words passed from said true color selector in said second and third modes, said second interpreter passing all said bits of data in received from said true color selector in said first mode;
• and
• true color output multiplexing circuitry coupled to said second interpreter circuitry and operable to select and output a plurality of multiple bit words of true color data from said bits passed from said second interpreter.

A method for providing data format compatibility between a graphics processor system operating in a data format selected from the Big Endian and Little Endian formats and a color palette operating in the other one of the Big Endian and Little Endian formats, the graphics processing system including a video memory for storing a plurality of color codes defining a video image to be displayed as a plurality of pixels, each color code comprising a plurality of data words formatted in accordance with the selected format such that the data words comprising each color code have a corresponding word ordering and bits comprising each color code have a corresponding bit ordering, the method comprising the steps of:

• reversibly coupling each color code from the video memory to the ordered input terminals of the color palette such that the word ordering of the color codes received by the color palette is compatible with the word ordering of the other one of said formats;
• selectively reversing bit ordering of all the bits comprising the color codes;
• passing through all the bits comprising a each color code in a first mode;
• passing through at least some of the bits comprising each color code as a data word having a bit ordering in a second mode;
• sequentially passing through at least first and second data words each comprising at least some of the bits from each color code received and each having a word ordering in a third mode;
• selectively reversing the bit ordering the data words passed through in the second and third modes;
• and
• selecting and outputing at least one multiple bit word of true color data from the bits passed through.